參數(shù)資料
型號: SN74ABT7819A-30PN
廠商: Texas Instruments, Inc.
英文描述: 512 】 18 】 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
中文描述: 512】18】2時鐘雙向先入先出存儲器
文件頁數(shù): 14/21頁
文件大?。?/td> 324K
代理商: SN74ABT7819A-30PN
SN74ABT7819A
512
×
18
×
2
CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SCBS756
MAY 2002
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
offset values for AF/AE
The AF/AE flag of each FIFO has two programmable limits: the almost-empty offset value (X) and the almost-full
offset value (Y). They can be programmed from the input of the FIFO after it is reset and before a word is written
to its memory. An AF/AE flag is high when its FIFO contains X or fewer words or (512
Y) or more words.
To program the offset values for AF/AEA, PENA is brought low after FIFOA
B is reset and only when CLKA is
low. On the following low-to-high transition of CLKA, the binary value on A0
A7 is stored as the almost-empty
offset value (X) and the almost-full offset value (Y). Holding PENA low for another low-to-high transition of CLKA
reprograms Y to the binary value on A0
A7 at the time of the second CLKA low-to-high transition.
During the first two CLKA cycles used for offset programming, PENA can be brought high only when CLKA is
low. PENA can be brought high at any time after the second CLKA pulse used for offset programming returns
low. A maximum value of 255 can be programmed for either X or Y (see Figure 9). To use the default values
of X = Y = 128, PENA must be tied high. No data is stored in FIFOA
B while the AF/AEA offsets are programmed.
The AF/AEB flag is programmed in the same manner, with PENB enabling CLKB to program the offset values
taken from B0
B7.
Figure 8
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Figure 9. Programming X and Y Separately for AF/AEA
Y
X and Y
A0
A7
WENA
W/RA
CSA
PENA
IRA
CLKA
RESET
ììììììììì
ììììììììì
3
4
相關PDF資料
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SN74ABT7819A-10PH 512 】 18 】 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT7819A-10PN 512 】 18 】 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT7819A-12PH 512 】 18 】 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
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相關代理商/技術參數(shù)
參數(shù)描述
SN74ABT7820-15N 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
SN74ABT7820-15PH 功能描述:先進先出 512 x 18 x 2 bidir ASynch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
SN74ABT7820-15PN 功能描述:先進先出 512 x 18 x 2 bidir ASynch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
SN74ABT7820-20PH 功能描述:先進先出 512 x 18 x 2 bidir ASynch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝:
SN74ABT7820-20PN 功能描述:先進先出 512 x 18 x 2 bidir ASynch 先進先出 Memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: