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參數(shù)資料
| 型號(hào)： | SN54LVTH18504AHV |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁(yè)數(shù)： | 26/40頁(yè) |
| 文件大小： | 594K |
| 代理商： | SN54LVTH18504AHV |
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SN54LVTH18504A, SN54LVTH182504A, SN74LVTH18504A, SN74LVTH182504A
3.3-V ABT SCAN TEST DEVICES
WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS
SCBS667B – JULY 1996 – REVISED JUNE 1997
32
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (normal mode) (see Figure 14)
SN54LVTH182504A
SN74LVTH182504A
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
CLKAB or CLKBA
0
100
0
80
0
100
0
80
MHz
t
Pulse duration
CLKAB or CLKBA high or low
4.4
5.6
4.4
5.6
ns
tw
Pulse duration
LEAB or LEBA high
3
ns
A before CLKAB
↑ or
B before CLKBA
↑
2.8
3
2.8
3
tsu
Setup time
A before LEAB
↓ or
CLK high
1.5
0.7
1.5
0.7
ns
su
A before LEAB
↓ or
B before LEBA
↓
CLK low
1.6
CLKEN before CLK
↑
2.8
3.4
2.8
3.4
t
Hld ti
A after CLKAB
↑ or
B after CLKBA
↑
1.4
1.1
1.4
1.1
th
Hold time
A after LEAB
↓ or B after LEBA↓
3.1
3.5
3.1
3.5
ns
CLKEN after CLK
↑
0.7
0.2
0.7
0.2
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (test mode) (see Figure 14)
SN54LVTH182504A
SN74LVTH182504A
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
TCK
0
50
0
40
0
50
0
40
MHz
tw
Pulse duration
TCK high or low
9.5
10.5
9.5
10.5
ns
t
St
ti
A, B, CLK, CLKEN, LE, or OE
before TCK
↑
6.5
7
6.5
7
tsu
Setup time
TDI before TCK
↑
2.5
3.5
2.5
3.5
ns
TMS before TCK
↑
2.5
3.5
2.5
3.5
t
Hld ti
A, B, CLK, CLKEN, LE, or OE
after TCK
↑
1.5
1
1.5
1
th
Hold time
TDI after TCK
↑
1.5
1
1.5
1
ns
TMS after TCK
↑
1.5
1
1.5
1
td
Delay time
Power up to TCK
↑
50
ns
tr
Rise time
VCC power up
1
s
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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