參數(shù)資料
型號(hào)： SN54LVT573W
廠商： Texas Instruments, Inc.
英文描述： 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
中文描述： 的3.3V ABT生根粉八路透明D類鎖存器具有三態(tài)輸出
文件頁(yè)數(shù)： 2/15頁(yè)
文件大?。?/td> 470K
代理商： SN54LVT573W
SN54LVT573, SN74LVT573
3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS138D – MAY 1992 – REVISED JULY 1995
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
D
H
H
L
H
L
L
L
L
X
Q0
Z
H
X
X
logic symbol
logic diagram (positive logic)
OE
LE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
C1
11
1Q
19
2Q
18
3Q
17
4Q
16
5Q
15
6Q
14
7Q
13
8Q
12
7
6D
8
7D
9
8D
EN
1
OE
LE
1D
1Q
1
11
2
19
To Seven Other Channels
C1
1D
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Voltage range applied to any output in the high state or power-off state, V
O
(see Note 1)
Current into any output in the low state, I
O
: SN54LVT573
–0.5 V to 4.6 V
–0.5 V to 7 V
–0.5 V to 7 V
. . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96 mA
128 mA
48 mA
64 mA
–50 mA
–50 mA
0.6 W
1.6 W
0.7 W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . .
SN74LVT573
. . . . . . . . . . . . . . . . . . . . . . . . .
SN74LVT573
Current into any output in the high state, I
O
(see Note 2): SN54LVT573
Input clamp current, I
IK
(V
I
< 0)
Output clamp current, I
OK
(V
O
< 0)
Maximum power dissipation at T
A
= 55
°
C (in still air) (see Note 3):DB package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
DW package
PW package
Storage temperature range, T
stg
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The maximum package power dissipation is calculated using a junction temperature of 150
°
C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerationsapplication note in the 1994 ABT Advanced BiCMOS Technology
Data Book literature number SCBD002B.
–65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
相關(guān)PDF資料
PDF描述
SN74LVT573DB 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LVT573DBRE4 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LVT573DWE4 10-Element Bar Graph Array
SN74LVT573DWRE4 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74LVT573PW 3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
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