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參數(shù)資料
| 型號： | SN54HCT74FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Up-to-250kHz Flyback PWM Voltage-Mode Controller with Programmable Standby Mode; Package: PDIP-16; No of Pins: 16; Container: Rail; Qty per Container: 500 |
| 中文描述： | 雙路D類上升沿觸發(fā)器，沒有明確的和預置觸發(fā)器 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大小： | 101K |
| 代理商： | SN54HCT74FK |
SN54HCT74, SN74HCT74
DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS169B – DECEMBER 1982 – REVISED MAY 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
SN54HCT74
MIN
NOM
SN74HCT74
MIN
NOM
UNIT
MAX
MAX
VCC
VIH
VIL
VI
VO
tt
TA
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
High-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2
2
V
Low-level input voltage
0
0.8
0
0.8
V
Input voltage
0
VCC
VCC
500
0
VCC
VCC
500
V
Output voltage
0
0
V
Input transition (rise and fall) time
0
0
ns
°
C
Operating free-air temperature
–55
125
–40
85
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
4.499
SN54HCT74
MIN
4.4
SN74HCT74
MIN
4.4
UNIT
MIN
4.4
MAX
MAX
MAX
VOH
VI= VIHor VIL
IOH = –20
μ
A
IOH = –4 mA
IOL = 20
μ
A
IOL = 4 mA
4 5 V
4.5 V
V
3.98
4.3
3.7
3.84
VOL
VI= VIHor VIL
VI = VIH or VIL
4 5 V
4.5 V
0.001
0.1
0.1
0.1
V
0.17
±
0.1
0.26
±
100
0.4
0.33
±
1000
II
ICC
VI = VCC or 0
VI = VCC or 0,
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC
5.5 V
±
1000
nA
μ
A
IO = 0
5.5 V
4
80
40
ICC
5.5 V
1.4
2.4
3
2.9
mA
Ci
4.5 V
to 5.5 V
3
10
10
10
pF
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
TA = 25
°
C
MIN
0
SN54HCT74
MIN
0
SN74HCT74
MIN
0
UNIT
MAX
MAX
MAX
fl
fclock
Clock frequency
4.5 V
27
18
22
MHz
5.5 V
0
30
0
20
0
24
PRE or CLR low
4.5 V
16
24
20
tw
Pulse duration
5.5 V
14
21
18
ns
CLK high or low
4.5 V
18
27
23
5.5 V
16
24
21
Data
4.5 V
12
18
15
tsu
Setup time before CLK
↑
5.5 V
11
16
14
ns
PRE or CLR inacti e
PRE or CLR inactive
4.5 V
0
0
0
5.5 V
0
0
0
th
Hold time data after CLK
Hold time, data after CLK
↑
4.5 V
5.5 V
0
0
0
0
0
0
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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