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參數(shù)資料
| 型號(hào)： | SN54ALVTH16244WD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 2.5-V/3.3-V 16位緩沖器/ 3司機(jī)態(tài)輸出 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 157K |
| 代理商： | SN54ALVTH16244WD |
SN54ALVTH16244, SN74ALVTH16244
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCES070G – JUNE 1996 – REVISED MAY 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
When V
CC
is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.2 V, the output-enable (OE) input should be tied to V
CC
through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of
the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54ALVTH16244 is characterized for operation over the full military temperature range of –55
°
C to
125
°
C. The SN74ALVTH16244 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
1
47
46
44
43
2
3
5
6
2OE
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
48
41
40
38
37
8
9
11
12
3OE
3A1
3A2
3A3
3A4
3Y1
3Y2
3Y3
3Y4
25
36
35
33
32
13
14
16
17
4OE
4A1
4A2
4A3
4A4
4Y1
4Y2
4Y3
4Y4
24
30
29
27
26
19
20
22
23
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| SN74ALVTH16244DGV | 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SN74ALVTH16244DGG | 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
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