參數(shù)資料
型號(hào): SMJ55161
廠商: Texas Instruments, Inc.
英文描述: 262144 BY 16-BIT MULTIPORT VIDEO RAM
中文描述: 262144由16位多端口視頻內(nèi)存
文件頁數(shù): 13/64頁
文件大小: 1505K
代理商: SMJ55161
SMJ55161
262144 BY 16-BIT
MULTIPORT VIDEO RAM
SGMS056D – MAY 1995 – REVISED OCTOBER 1997
13
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
extended data output
The SMJ55161 features EDO during DRAM accesses. While RAS and TRG are low, the DRAM output remains
valid. The output remains valid even when CASx returns high until WE is low, TRG is high, or both CASx and
RAS are high (see Figure 1 and Figure 2). The EDO mode functions during all read cycles including DRAM read,
page-mode read, and read-modify-write cycles (see Figure 3).
RAS
CASx
DQ0–DQ15
TRG
Valid Output
tdis(RH)
tdis(G)
Figure 1. DRAM Read Cycle With RAS-Controlled Output
RAS
CASx
DQ0–DQ15
TRG
Valid Output
tdis(CH)
tdis(G)
Figure 2. DRAM Read Cycle With CASx-Controlled Output
相關(guān)PDF資料
PDF描述
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