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參數(shù)資料
| 型號： | SMJ320C50GFA |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 數(shù)字信號處理器 |
| 文件頁數(shù)： | 36/54頁 |
| 文件大?。?/td> | 614K |
| 代理商： | SMJ320C50GFA |
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SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
36
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
changing XFx from an output to an input
The following table defines the timing parameters for changing the XFx pin from an output pin to an input pin.
timing requirements for changing XFx from output to input mode (see Figure 25)
MIN
MAX
UNIT
t
su(XF-H1L)
t
h(H1L-XF)
Setup time, XFx before H1 low
4
ns
Hold time, XFx after H1 low
0
ns
switching characteristics over recommended operating conditions for changing XFx from output to
input mode (see Figure 25)
PARAMETER
MIN
MAX
UNIT
t
dis(H3H-XF)
* Not production tested
Disable time, XFx after H3 high
5*
ns
Execute
Load of IOF
Buffers Go
From Output
to Output
Synchronizer
Delay
Value on Pin
Seen in IOF
H3
H1
XFx
INXFx Bit
(see Note A)
I/OxFx Bit
(see Note A)
Data
Sampled
Data
Seen
Output
t
dis(H3H-XF)
t
su(XF-H1L)
t
h(H1L-XF)
NOTE A: I/OxFx represents either bit 1 or bit 5 of the IOF register, and INXFx represents either bit 3 or bit 7 of the IOF register.
Figure 25. Timing for Changing XFx From Output to Input Mode
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