參數(shù)資料
型號： SMJ320C50GFA
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DIGITAL SIGNAL PROCESSOR
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 30/54頁
文件大?。?/td> 614K
代理商： SMJ320C50GFA
SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
30
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
memory read/write timing
The following tables define memory read/write timing parameters for STRB.
timing requirements for memory read/write
(see
Figure 18
,
Figure 19, and Figure 20)
MIN
MAX
UNIT
t
su(D-H1L)R
t
h(H1L-D)R
t
su(RDY-H1H)
t
h(H1H-RDY)
t
d(A-RDY)
Setup time, Data before H1 low (read)
5*
ns
Hold time, Data after H1 low (read)
-1*
ns
Setup time, RDY before H1 high
5
ns
Hold time, RDY after H1 high
-1*
ns
Delay time, Address valid to RDY
P - 6*
ns
t
v(A-D)
Valid time Data valid after address PAGEx or STRB valid
Valid time, Data valid after address PAGEx, or STRB valid
0 wait state, C
L
= 30 pF
1 wait state
6*
ns
t
c(H)
+ 6*
ns
* Not production tested
These timings assume a similar loading of 30 pF on all pins.
P = t
c(H)
/2 (when duty cycle equals 50%).
switching characteristics over recommended operating conditions for memory read/write
(see
Figure 18
,
Figure 19, and Figure 20)
PARAMETER
MIN
MAX
UNIT
t
d(H1L-SL)
t
d(H1L-SH)
t
d(H1H-RWL)W
t
d(H1L-A)
t
d(H1H-RWH)W
t
d(H1H-A)W
t
v(H1L-D)W
t
h(H1H-D)W
* Not production tested
These timings assume a similar loading of 30 pF on all pins.
Delay time, H1 low to STRB low
-1*
3
ns
Delay time, H1 low to STRB high
-1*
3
ns
Delay time, H1 high to R/W low (write)
-1*
3
ns
Delay time, H1 low to address valid
-1*
3
ns
Delay time, H1 high to R/W high (write)
-1*
3
ns
Delay time, H1 high to address valid on back-to-back write cycles (write)
-1*
3*
ns
Valid time, Data after H1 low (write)
5
ns
Hold time, Data after H1 high (write)
0*
5
ns
Output load characteristics for high-speed and low-speed (low-noise) output buffers are shown in Figure 18.
High-speed buffers are used on A0 - A23, PAGE0 - PAGE3, H1, H3, STRB, and R/W. All other outputs use the
low-speed, (low-noise) output buffer.
2
3
4
5
10
20
30
50
40
Low-Noise Buffer
0.05 ns/pF
High-Speed Buffer
0.04 ns/pF
1
Load Capacitance (pF)
C
Lmax
= 30 pF
LOAD
0 pF
15 pF
30 pF
50 pF
2.0
2.6
3.2
4.0
2.8
3.4
4.4
5.25
HIGH
SPEED
LOW
NOISE
Figure 18. Output Load Characteristics, Buffer Only
相關(guān)PDF資料
PDF描述
SMJ320VC33GNMM150 DIGITAL SIGNAL PROCESSOR
SMJ320C25FJ DIGITAL SIGNAL PROCESSOR
SMJ320C25GB DIGITAL SIGNAL PROCESSOR
SMJ320C30GB DIGITAL SIGNAL PROCESSOR
SMJ320C30HFG DIGITAL SIGNAL PROCESSOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SMJ320C50GFAM50 制造商:Texas Instruments 功能描述:DSP FIX PT 16BIT 50MHZ 25MIPS 141CPGA - Trays
SMJ320C50GFAM66 制造商:Texas Instruments 功能描述:DSP FIX PT 16BIT 66MHZ 33MIPS 141CPGA - Trays
SMJ320C50HFG 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSOR
SMJ320C50HFGM50 制造商:Texas Instruments 功能描述:DSP FIX PT 16BIT 50MHZ 25MIPS 132CFPAK - Trays
SMJ320C50HFGM66 制造商:Texas Instruments 功能描述:5962-9455804QYA, 10K RAM, 2K ROM - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*