參數(shù)資料
型號： SMJ320C50GFA
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DIGITAL SIGNAL PROCESSOR
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 27/54頁
文件大?。?/td> 614K
代理商： SMJ320C50GFA
SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
27
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
clock circuit timing
The following table defines the timing parameters for the clock circuit signals.
circuit parameters for on-chip crystal oscillator
(see Figure 15)
PARAMETER
MIN
TYP
MAX
UNIT
V
O
F
O
V
bias
R
fbk
R
out
V
xoutac
V
xinac
V
xoutl
V
xouth
V
inl
V
inh
V
xinh
C
xout
C
xin
t
d(XIN-H1)
I
inl
I
inh
* Not production tested
This circuit is intended for series resonant fundamental mode operation.
Signal amplitude is dependent on the crystal and load used.
Oscillator internal supply voltage
CV
DD
V
Fundamental mode frequency range
1*
20*
MHz
DC bias point (input threshold)
40*
50
60*
%V
O
k
%V
O
%V
O
V
Feedback resistance
100*
300
500*
Small signal ac output impedance
The ac output voltage with test crystal
The ac input voltage with test crystal
250*
500
1000*
85
85
V
xin
= V
xinh
, I
xout
= 0, F
O
=0 (logic input)
V
xin
= V
xinl
, I
xout
= 0, F
O
=0 (logic input)
When used for logic level input, oscillator enabled
V
SS
- 0.1*
CV
DD
- 0.3*
-0.3*
V
SS
+ 0.3*
CV
DD
+ 0.1*
0.2 x V
O
*
DV
DD
+ 0.3*
DV
DD
+ 0.3
5*
V
V
When used for logic level input, oscillator enabled
0.8 x V
O
*
0.7 x DV
DD
2*
V
When used for logic level input, oscillator disabled
V
XOUT internal load capacitance
3
pF
XIN internal load capacitance
2*
3
5*
pF
Delay time, XIN to H1 x1 and x0.5 modes
2
5.5
8
ns
μ
A
μ
A
Input current, feedback enabled, V
il
= 0
Input current, feedback enabled, V
il
= V
ih
50*
-50*
XOUT
XIN
C
1
C
2
Crystal
R
fbk
Rd
V
O
C
XIN
C
XOUT
R
OUT
To internal
clock generator
NOTE A: See Table 3 for value of Rd.
Figure 15. On-Chip Oscillator Circuit
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