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| 型號(hào)： | SMJ320C50GFA |
| 廠商： | Texas Instruments, Inc. |
| 元件分類(lèi)： | 數(shù)字信號(hào)處理 |
| 英文描述： | DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 25/54頁(yè) |
| 文件大?。?/td> | 614K |
| 代理商： | SMJ320C50GFA |
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SM320VC33, SMJ320VC33
DIGITAL SIGNAL PROCESSOR
SGUS034E - FEBRUARY 2001 - REVISED OCTOBER 2002
25
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251-1443
PARAMETER MEASUREMENT INFORMATION
timing parameter symbology
Timing parameter symbols used herein were created in accordance with JEDEC Standard 100. To shorten the
symbols, some of the pin names and other related terminology have been abbreviated as follows, unless
otherwise noted:
Lowercase subscripts and their meanings
Letters and symbols and their meanings
a
access time
H
High
c
cycle time (period)
L
Low
d
delay time
V
Valid
dis
disable time
Z
High Impedance
en
enable time
f
fall time
h
hold time
r
rise time
su
setup time
t
transition time
v
valid time
w
pulse duration (width)
x
unknown, changing, or don’t care level
Additional symbols and their meaning
A
Address lines (A23- A0)
H
H1 and H3
ASYNCH
Asynchronous reset signals (XF0, XF1, CLKX0, DX0,
FSX0, CLKR0, DR0, FSR0, TCLK0, and TCLK1)
HOLD
HOLD
CLKX
CLKX0
HOLDA
HOLDA
CLKR
CLKR0
IACK
IACK
CONTROL
Control signals
INT
INT3- INT0
D
Data lines (D31- D0)
PAGE
PAGE0- PAGE3
DR
DR
RDY
RDY
DX
DX
RW
R/W
EXTCLK
EXTCLK
RW
R/W
FS
FSX/R
RESET
RESET
FSX
FSX0
S
STRB
FSR
FSR0
SCK
CLKX/R
GPI
General-purpose input
SHZ
SHZ
GPIO
General-purpose input/output; peripheral pin (CLKX0,
CLKR0, DX0, DR0, FSX0, FSR0, TCLK0, and TCLK1)
TCLK
TCLK0, TCLK1, or TCLKx
GPO
General-purpose output
XF
XF0, XF1, or XFx
H1
H1
XF0
XF0
H3
H3
XF1
XF1
XIN
XIN
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