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TMP320C40KGDC, SMJ320C40KGDC, TMP320C40KGDCT, SMJ320C40KGDCT
FLOATING-POINT DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIES
SGUS024B – MARCH 1997 – REVISED APRIL 2000
3
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
description (continued)
The simulation tools include:
Parallel DSP system-level simulation, by Logic Modeling Corporation (LMC), which includes a hardware
verification (HV) model and a full functional (FF) model
TI software simulator with high-level language debugger interface for simulating a single processor
The hardware development and verification tools include:
Parallel processor in-circuit emulator and high-level language debugger: XDS510
Parallel processor development system with four TMS320C40s, local and global memory, and
communication port connections
known good die technology
Known good die (KGD) options are offered for use in multichip modules and chip-on-board (COB) applications.
There are currently two verification technologies used at TI to support KGD requirements for the
TMP/SMJ320C40KGD: Removable Tab (R-Tab), and Temporary Wire Bond (TWB).
The availability of selected DSP products in a tape-automated bond (TAB) configuration has made possible the
use of a removable TAB technique. The TAB leadframe is attached to a gold-bumped die using modified bonding
parameters. This technique allows easy removal of the tape after all needed 100% screens and parametric tests
have been performed. The tape is removed from the tested part and the die is shipped in a conventional die
container. The gold bumps remain on the bond pads, which allow for subsequent attachment of gold-ball bonds.
Similarly, with KGD using the TWB technique, bond wires are attached to the bond pads using adjusted bonding
parameters which allow for easy removal of the die after all needed 100% screens and parametric tests have
been performed. The die is removed from the temporary package and the die is shipped in a conventional die
container.
visual inspection of known good die (KGD) using temporary wire bond (TWB) process
QML KGD devices produced using the TWB technology do not optically meet MIL-STD-883E (Method 2010,
paragraph 3.1.1.1.h) metal bond pad visual inspection criterion due to the bond pad marks formed during
bonding removal process. However, these devices have been reliably bonded using normal wire bond
precesses, and pass bond strength evaluations.
electrical specifications
For military electrical and timing specifications, please refer to the SMJ320C40 Digital Signal Processordata
sheet, literature number SGUS017. For commercial electrical and timing specifications, see the TMS320C40
Digital Signal Processor Data Sheet literature number SPRS038.
XDS510 is a trademark of Texas Instruments Incorporated.