
SMH4046
Preliminary Information
Summit Microelectronics, Inc
2082 1.7 08/23/04
36
Register R85, 8D, 95, 9D, A5, AD, B5, BD – Channel A, B, C, CARD12V, CARD3V, CARD5V, VDD and 12VIN
Limit Settings [7:0].
Register R85, 8D, 95, 9D, A5, AD, B5, BD
D7
D6
D5
D4
D3
D2
D1
D0
C7
C6
C5
C4
C3
C2
C1
C0
Register R86, 8E, 96, 9E, A6, AE, B6, BE – Channel A, B, C, CARD12V, CARD3V, CARD5V, VDD and 12VIN
Limit Settings [9:8].
Register R86, 8E, 96, 9E, A6, AE, B6, BE
D7
D6
D5
D4
D3
D2
D1
D0
-
-
-
-
-
-
C9
C8
Register R87, 8F, 97, 9F, A7, AF, B7, BF – Channel A, B, C, CARD12V, CARD3V, CARD5V, VDD and 12VIN
Limit Settings [7:0].
Register R87, 8F, 97, 9F, A7, AF, B7, BF
D7
D6
D5
D4
D3
D2
D1
D0
C7
C6
C5
C4
C3
C2
C1
C0
Register RC0 –VCC3 Low Limit 1 Triggers, Limit Bits [9:8].
Register RC0, C2, C4, C6
D7
D6
D5
D4
D3
D2
D1
D0
0
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
0
-
-
-
-
-
-
-
1
-
-
Action
Channel High Limit 1 Bits [7:0]
Action
Channel High Limit 2 Bits [9:8]
Action
Channel High Limit 2 Bits [7:0]
Action
VCC3 Low Limit 1 does not trigger a RST
VCC3 Low Limit 1 triggers a RST
VCC3 Low Limit 1 does not trigger an IRQ
VCC3 Low Limit 1 triggers an IRQ
VCC3 Low Limit 1 does not trigger a Power Down.
VCC3 Low Limit 1 triggers a Power Down
VCC3 Low Limit 1 does not trigger a Fault
VCC3 Low Limit 1 triggers a Fault
VCC3 Low Limit 1 Consecutive Conversions for
Fault = 1
VCC3 Low Limit 1 Consecutive Conversions for
Fault = 2
VCC3 Low Limit 1 Consecutive Conversions for
Fault = 4
VCC3 Low Limit 1 Consecutive Conversions for
Fault = 6
VCC3 Low Low Limit 1 Bits [9:8]
-
-
-
-
0
0
-
-
-
-
-
-
0
1
-
-
-
-
-
-
1
0
-
-
-
-
-
-
1
1
-
-
-
-
-
-
-
-
C9
C8
Register RC1– VCC3 Low Limit 1 Settings [7:0].
Register RC1
D7
D6
D5
C7
C6
C5
D4
C4
D3
C3
D2
C2
D1
C1
D0
C0
Action
VCC3 Low limit 1 Bits[7:0]
CONFIGURATION REGISTERS (CONTINUED)