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參數(shù)資料
| 型號： | SMH4042ASAKM |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | TERM.5"7 TS GRAPH. C.STN LOW END VERS. |
| 中文描述： | 分布式電源熱插拔控制器的CompactPCI |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 1822K |
| 代理商： | SMH4042ASAKM |
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10
SMH4042A
2070 9.1 5/27/03
SUMMIT MICROELECTRONICS, Inc.
Figure 4. Host-Initiated Reset Timing
Over-current Circuit Breaker
The SMH4042A provides a circuit breaker function to
protect against short circuit conditions or exceeding the
supply limits. By placing a series resistor between the
host supply and the CBI pins, the breakers will trip
whenever the voltage drop across the series resistor is
greater than 50mV for more than 16μs.
The over-current detection circuit was designed to maxi-
mize protection while minimizing false alarms. The most
critical period of time is during the power-on sequence
when the backend circuits are first being energized. If the
card has a faulty component or shorted traces, the time
to shut off should be minimal. However, if the board has
been operational for a long period of time the likelihood of
a catastrophic failure occurring is quite low. Therefore,
the SMH4042A employs two different sampling schemes.
During power-up the device will sample the current every
500ns. If eight consecutive over-current conditions are
detected the VGATE outputs will immediately be shut
down. This provides an effective response time of 4μs.
During normal operation, after the FETs have been turned
on, the sampling rate will be adjusted to 2μs, thus
providing an effective response time of 16μs.
Also see Figure 3.
RESET CONTROL
While in the power sequencing mode, the reset outputs
are the last to be released. When they are released all
conditions of a successful power-up sequence must have
been met:
1) VCC and HST_3V_MON are at or above their respec-
tive VTRIP levels;
2) BD_SEL# inputs are low;
3) CARD_3V_MON and CARD_5V_MON are at or above
their respective trip levels;
4) PWR_EN is high; and
5) PCI_RST is high.
The PCI-RST# input must be high for the reset outputs to
be released. Assuming all of the conditions listed above
have been met and PCI_RST# is high and t
PURST
has
expired, a low input of greater than 40ns duration on the
PCI_RST# input will initiate a reset cycle. The duration of
the reset cycle will be determined by the PCI_RST# input.
If PCI_RST# low is shorter than t
PURST
, the reset outputs
will be driven active for t
PURST
. If PCI_RST# is longer than
t
PURST
the reset outputs will remain active until PCI_RST#
is released.
Also see Figure 4.
LOCAL_PCI_RST#
t
PURST
2070 Fig04
LOCAL_PCI_RST
PCI_RST#
t
PRLPR
t
PURST
相關PDF資料 |
PDF描述 |
|---|---|
| SMH4042ASAKN | TERM.5"7 TS GRAPH. C.TFT STD. VERS. |
| SMH4042ASALM | TERM.7"5 TS GRAPH. C.STN STD. VERS. |
| SMH4042ASALN | TERM.7"5 TS GRAPH. C.TFT STD. VERS. |
| SMH4042ASBGM | TERMINAL TOUCH 7"5 TFT COLOR HIGH END |
| SMH4042ASBGN | TERM.10"4 TS GRAPH. C.STN STD. VERS. |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SMH4042ASAKN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Distributed Power Hot-Swap Controller for CompactPCI |
| SMH4042ASALM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Distributed Power Hot-Swap Controller for CompactPCI |
| SMH4042ASALN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Distributed Power Hot-Swap Controller for CompactPCI |
| SMH4042ASBGM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Distributed Power Hot-Swap Controller for CompactPCI |
| SMH4042ASBGN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Distributed Power Hot-Swap Controller for CompactPCI |
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