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參數(shù)資料
| 型號(hào)： | UPD75216A |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 47/72頁 |
| 文件大?。?/td> | 530K |
| 代理商： | UPD75216A |
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47
μ
PD75216A
*
1.
Calculation of total loss
Design so that the sum of the following three power consumption values for the
μ
PD75216ACW/GF will be
less than the total loss P
T
(It is recommended to use the system with 80 % or less of the rating).
CPU loss
: Given as V
DD
(MAX.)
×
I
DD1
(MAX.)
Output pin loss
: There are normal output pin loss and display output pin loss. It is necessary
to add a loss derived from the flow of maximum current to each output pin.
Pull-down register loss : Power loss due to a pull-down resistor incorporated in the display output pin
by mask option.
Example
Suppose 4-LED output with 9
SEG
×
11
DIGIT
, V
DD
= 5 V + 10 % and 4.19 MHz oscillation and let a current of
3 mA, 15 mA and up to 10 mA flow to the segment pin, timing pin and LED output pin, respectively.
Further, let the voltage of fluorescent display tube (V
LOAD
voltage) be –30 V and normal voltage be small.
CPU loss : 5.5 V
×
9.0 mA = 49.5 mW
Pin loss
: Segment pin ..... 2V
×
3 mA
×
9 = 54 mW
Timing pin......... 2V
×
15 mA = 30 mW
LED output ........
Pull-down resistor loss ........
PT =
+
+
= 690.6 mW
In this example, since the allowable total loss is 600 mW for the shrink DIP package, it is necessary to
decrease power consumption by decreasing the number of on-chip pull-down resistors. In this example,
power consumption can be adjusted to 577.8 mW by incorporating pull-down resistors in only 11 digit
outputs and 7 segment outputs and externally mounting pull-down resistors to the 2 remaining segment
outputs.
2.
Except the system clock oscillator, display controller and timer/pulse generator.
3.
The operating voltage range varies depending on the cycle time. Refer to the section describing AC
characteristics.
×
2 V
×
10 mA
×
4 = 53 mW
10
15
(30 + 5.5V)
2
25 k
×
10 = 504.1 mW
#
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