- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374786 > SHARP_LH7A404 (Sharp Corporation) 32 BIT SYSTEM ON CHIP PDF資料下載
參數(shù)資料
| 型號(hào)： | SHARP_LH7A404 |
| 廠商： | Sharp Corporation |
| 英文描述： | 32 BIT SYSTEM ON CHIP |
| 中文描述： | 32位片上系統(tǒng) |
| 文件頁數(shù)： | 28/51頁 |
| 文件大?。?/td> | 387K |
| 代理商： | SHARP_LH7A404 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當(dāng)前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁
LH7A404
32-Bit System-on-Chip
28
Advance Data Sheet
Synchronous Serial Port (SSP)
The SSP is a master-only interface for synchro-
nous serial communication with peripheral devices
that have either Motorola SPI, National Semicon-
ductor MICROWIRE, or Texas Instruments
Synchronous Serial Interfaces.
The SSP performs serial-to-parallel conversion on
data received from a peripheral device. The transmit
and receive paths are buffered with internal FIFO mem-
ories allowing up to eight 16-bit values to be stored
independently in both transmit and receive modes.
Serial data is transmitted on SSPTXD and received on
SSPRXD.
The LH7A404 SSP includes a programmable bit rate
clock divider and prescaler to generate the serial output
clock SCLK from the input clock SSPCLK. Bit rates are
supported to 2 MHz and beyond, subject to choice of
frequency for SSPCLK; the maximum bit rate will usu-
ally be determined by peripheral device’s capability.
UART/IrDA
The LH7A404 contains three UARTs; UART1,
UART2, and UART3.
The UART performs:
Serial-to-Parallel conversion on data received from
the peripheral device
Parallel-to-Serial conversion on data transmitted to
the peripheral device.
The transmit and receive paths can both be routed
through the DMA separately or simultaneously, and are
buffered with internal FIFO memories. This allows up to
16 bytes to be stored independently in both transmit and
receive modes.
The UART can generate:
Four individually maskable interrupts from the
receive, transmit and modem status logic blocks
A single combined interrupt so that the output is
asserted if any of the individual interrupts are
asserted and unmasked.
If a framing, parity or break error occurs during
reception, the appropriate error bit is set and stored in
the FIFO. If an overrun condition occurs, the overrun
register bit is set immediately and the FIFO data is pre-
vented from being overwritten. UART1 also supports
IrDA 1.0 (15.2 kbit/s).
The modem status input signals Clear to Send
(CTS), Data Carrier Detect (DCD) and Data Set Ready
(DSR) are supported on UART2 and UART3.
Timers
The LH7A404 includes three programmable timers.
Each of the timers can operate in two modes: free run-
ning and pre-scale. The timers are programmed using
four registers; Load, Value, Control, and Clear.
Two identical timers, Timer 1 (TC1) and Timer 2
(TC2), use clock sources of either 508 kHz or 2 kHz. The
clock source and mode is selectable by writing to the
appropriate bits in the system control register. Each
timer has a 16-bit read/write data register and a control
register. The timer is loaded with the value written to the
data register immediately. This value is then decre-
mented on the next active clock edge to arrive after the
write. When the timer underflows, it immediately asserts
its appropriate interrupt.
Timer 3 (TC3) has the same basic operation, but is
clocked from a single 7.3728 MHz source. Once the
timer has been enabled and written to, it decrements
on the next rising edge of the 7.3728 MHz clock after
the data register has been updated.
FREE-RUNNING MODE
In free-running mode, the timer wraps around to
0xFFFF when it underflows and continues counting
down.
PRE-SCALE MODE
In pre-scale (periodic) mode, the value written to
each timer is automatically re-loaded when the timer
underflows. This mode can be used to produce a pro-
grammable frequency to drive the buzzer or generate a
periodic interrupt.
Real Time Clock (RTC)
The RTC provides a basic alarm function or long
time-base counter. This is achieved by generating an
interrupt signal after counting for a programmed num-
ber of cycles of a real-time clock input. Counting in one
second intervals is achieved by use of a 1 Hz clock
input to the RTC.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SHD501290 | HERMETIC ULTRA LOW DROPOUT LINEAR REGULATOR |
| SHD526030 | POSITIVE ADJUSTABLE 1.5 AMP REGULATOR |
| SHD526150 | LINEAR VOLTAGE REGULATOR THREE TERMINAL-POSITIVE-ADJUSTABLE 3.0 Amp, Low Dropout Voltage TO-257 Hermetic Package |
| SHD674122 | HERMETIC SILICON CARBIDE RECTIFIER |
| SHD674122B | HERMETIC SILICON CARBIDE RECTIFIER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SHAUN | 制造商:Nwazet 功能描述:Raspberry Pi "Shaun" Case |
| SH-AX1000-CQ352RTFG896-A | 制造商:Microsemi Corporation 功能描述:SH-AX1000-CQ352RTFG896-A - Bulk |
| SH-AX2000-CQ352RTFG896-A | 制造商:Microsemi Corporation 功能描述:SH-AX2000-CQ352RTFG896-A - Bulk |
| SH-AX250-CQ352RTFG484S-A | 制造商:Microsemi Corporation 功能描述:SH-AX250-CQ352RTFG484S-A - Bulk |
| SHB | 制造商:PREMO 制造商全稱:PREMO CORPORATION S.L 功能描述:SMD Power Inductors Shielded |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。