參數(shù)資料
型號(hào)： SH7751
廠商： Renesas Technology Corp.
英文描述： SuperH RISC engine
中文描述： SuperH RISC引擎
文件頁(yè)數(shù)： 610/1105頁(yè)
文件大?。?/td> 6809K
代理商： SH7751
Rev. 3.0, 04/02, page 570 of 1064
There is a single serial data transfer format.
Data length:
Receive error detection:
Full-duplex communication capability
The transmitter and receiver are mutually independent, enabling transmission and reception to
be executed simultaneously. Double-buffering is used in both the transmitter and the receiver,
enabling continuous transmission and continuous reception of serial data.
On-chip baud rate generator allows any bit rate to be selected.
Choice of serial clock source: internal clock from baud rate generator or external clock from
SCK pin
Four interrupt sources
There are four interrupt sources—transmit-data-empty, transmit-end, receive-data-full, and
receive-error—that can issue requests independently. The transmit-data-empty interrupt and
receive-data-full interrupt can activate the DMA controller (DMAC) to execute a data transfer.
When not in use, the SCI can be stopped by halting its clock supply to reduce power
consumption.
8 bits
Overrun errors
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