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4. After the operation, the 32-bit remainder is written to DVDNTH and the 32-bit quotient is
written to DVDNT.
10.3.3
Handling of Overflows
When the results of operations exceed the ranges expressed as signed 32 bits (when, in division
between two negative numbers, the quotient is the maximum value and a remainder (negative
number) is generated) or when the divisor is 0, an overflow will result.
When an overflow occurs, the OVF bit is set and an overflow interrupt is generated if interrupt
generation is enabled (the OVFIE bit in DVCR is 1). The operation will then end with the result
after 6 cycles of operation stored in the DVDNTH and DVDNTL registers. If interrupt generation
is disabled (the OVFIE bit is 0), the operation will end with the operation result at 6 cycles set in
DVDNTH and the maximum value H'7FFFFFFF or minimum value H'80000000 set in DVDNTL.
In the SH7604, the maximum value results when a positive quotient overflows; the minimum
value results when a negative quotient overflows. The first three cycles of the 6 cycles executed
when an overflow occurs are used for flag setting within the division unit and the next three for
division.
10.4
Usage Notes
10.4.1
Access
All accesses to the division unit except DVCR and VCRDIV must be 32-bit reads or writes. Word
accesses to registers other than DVCR and VCRDIV result in reading or writing of undefined
values. In the division unit, a read instruction is extended for one cycle immediately after an
instruction that writes to a register, even if the register is the same, to ensure that the value written
is accurately set in the destination register in the division unit.
When a read or write instruction is issued while the division unit is operating, the read or write
instruction is continuously extended until the operation ends. This means that instructions that do
not access the division unit can be parallel-processed. When an instruction is executed that writes
to any register of the division unit immediately following an instruction that writes to the division
start-up registers (DVDNTL or DVDNT), the correct value may not be set in the start-up register.
Specify an instruction other than one that writes to a division unit register for the instruction
immediately following instruction that writes to a start-up register.
Because of the above restrictions, efficient processing can be achieved by executing instructions
that do not access the division unit for 39 cycles after starting the operation, then issuing a read
instruction after the 39th cycle.