
vii
Section 11 16-Bit Free-Running Timer
......................................................................... 295
11.1
Overview............................................................................................................................ 295
11.1.1 Features................................................................................................................. 295
11.1.2 Block Diagram...................................................................................................... 296
11.1.3 Pin Configuration.................................................................................................. 297
11.1.4 Register Configuration.......................................................................................... 297
11.2
Register Descriptions......................................................................................................... 298
11.2.1 Free-Running Counter (FRC)............................................................................... 298
11.2.2 Output Compare Registers A and B (OCRA and OCRB).................................... 298
11.2.3 Input Capture Register (ICR)................................................................................ 299
11.2.4 Timer Interrupt Enable Register (TIER)............................................................... 299
11.2.5 Free-Running Timer Control/Status Register (FTCSR)....................................... 300
11.2.6 Timer Control Register (TCR).............................................................................. 302
11.2.7 Timer Output Compare Control Register (TOCR)............................................... 303
11.3
CPU Interface..................................................................................................................... 304
11.4
Operation............................................................................................................................ 307
11.4.1 FRC Count Timing ............................................................................................... 307
11.4.2 Output Timing for Output Compare..................................................................... 308
11.4.3 FRC Clear Timing................................................................................................ 308
11.4.4 Input Capture Input Timing.................................................................................. 309
11.4.5 Input Capture Flag (ICF) Setting Timing............................................................. 310
11.4.6 Output Compare Flag (OCFA, OCFB) Setting Timing........................................ 310
11.4.7 Timer Overflow Flag (OVF) Setting Timing ....................................................... 311
11.5
Interrupt Sources................................................................................................................ 312
11.6
Example of FRT Use.......................................................................................................... 312
11.7
Usage Notes ....................................................................................................................... 313
Section 12 Watchdog Timer (WDT)
.............................................................................. 319
12.1
Overview............................................................................................................................ 319
12.1.1 Features................................................................................................................. 319
12.1.2 Block Diagram...................................................................................................... 320
12.1.3 Pin Configuration.................................................................................................. 320
12.1.4 Register Configuration.......................................................................................... 321
12.2
Register Descriptions......................................................................................................... 321
12.2.1 Watchdog Timer Counter (WTCNT).................................................................... 321
12.2.2 Watchdog Timer Control/Status Register (WTCSR) ........................................... 322
12.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 323
12.2.4 Register Access..................................................................................................... 324
12.3
Operation............................................................................................................................ 326
12.3.1 Operation in Watchdog Timer Mode.................................................................... 326
12.3.2 Operation in Interval Timer Mode........................................................................ 328
12.3.3 Operation in Standby Mode.................................................................................. 328
12.3.4 Timing of Overflow Flag (OVF) Setting.............................................................. 329