
Rev. 2.0, 09/02, page 714 of 732
Item
Page
Revisions (See Manual for Details)
Table 2.4 T Bit
20
Description amended.
ADD
#1, R0
→
ADD
#-1, R0
Execution states amended.
Instruction
Execution States
T Bit
BF/S label
2/1
*
2.5.1 Instruction Set by
Classification Branch
Instructions
38
Figure 2.4 Transitions
between Processing
States
41
Description amended.
proException
When an internal power-on
manual reset by
WDT occurs
Exception
processing
Exception
processing
ends
NMI or IRQ interrupt
source occurs
= 1
= 1,
= 1
Bus request
cleared
Bus request
generated
3.1 Selection of
Operating Modes
43
Description added.
This LSI has four operating modes and four clock modes.
The operating mode is determined by the setting of MD3 to
MD0, and FWP pins. Do not change these pins during LSI
operation (while power is on). Do not set these pins in the
other way than the combination shown in table 3.1.
When power is applied to the system, be sure to conduct
power-on reset.
Table 3.2 Clock Mode
Setting
44
System clock output (CK) added.
4.3.1 Note on crystal
Resonator
50
Description amended.
A sufficient evaluation at the user’s site is necessary to use
the LSI, by referring the resonator connection examples
shown in this section, because various characteristics related
to the crystal resonator are closely linked to the user’s board
design. As the oscillator circuit’s circuit constant external
circuit’s component should be determined in consultation
with the resonator manufacturer. The design must ensure
that a voltage exceeding the maximum rating is not applied
to the oscillator pin.