
Rev. 2.0, 09/02, page 128 of 732
9.4
Address Map
Figure 9.2 shows the address format used by this LSI.
Output address:
Output from the address pins
CS space selection:
Decoded, outputs
to
when A31 to A24 = 00000000
Space selection:
Not output externally; used to select the type of space
On-chip ROM space or CS space when 00000000 (H'00)
Reserved (do not access) when 00000001 to 11111110 (H'01 to H'FE)
On-chip peripheral module space or on-chip RAM space when 11111111 (H'FF)
A31 to A24
A23, A22
A21
A0
Figure 9.2 Address Format
This chip uses 32-bit addresses:
Bits A31 to A24 are used to select the type of space and are not output externally.
Bits A23 and A22 are decoded and output as chip select signals (
CS3
to
CS0
) for the
corresponding areas when bits A31 to A24 are 00000000.
A21 to A0 are output externally.
Table 9.2 shows the address map.
Table 9.2 Address Map
On-chip ROM enabled mode
Address
Space
Memory
Size
Bus Width
H'00000000 to H'0003FFFF
On-chip ROM
On-chip ROM
256 kbytes
32 bits
H'00040000 to H'001FFFFF
Reserved
Reserved
H'00200000 to H'003FFFFF
CS0 space
External space
2 Mbytes
8/16/32 bits
*
1
H'00400000 to H'007FFFFF
CS1 space
External space
4 Mbytes
8/16/32 bits
*
1
H'00800000 to H'00BFFFFF
CS2 space
External space
4 Mbytes
8/16/32 bits
*
1
H'00C00000 to H'00FFFFFF
CS3 space
External space
4 Mbytes
8/16/32 bits
*
1
H'01000000 to H'FFFF7FFF
Reserved
Reserved
H'FFFF8000 to H'FFFFBFFF
On-chip peripheral
module
On-chip peripheral
module
16 kbytes
8/16 bits
H'FFFFC000 to H'FFFFDFFF
Reserved
Reserved
H'FFFFE000 to H'FFFFFFFF
On-chip RAM
On-chip RAM
8 kbytes
32 bits