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| 型號(hào)： | SG500DYB |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封裝： | 0.209 INCH, SSOP-28 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 92K |
| 代理商： | SG500DYB |
SG500
Low Jitter Spectrum Clock Generator for PowerPC Designs.
Approved Product
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev.2.1
9/18/98
MILPITAS, CA 95035. TEL: 408-263-6300. FAX 408-263-6571
Page 3 of 7
SPREAD SPECTRUM CLOCK GENERATION (SSCG)
Spread Spectrum is a modulation technique applied here for maximum efficiency in minimizing Electro-Magnetic
Interference radiation generated from repetitive digital signals mainly clocks. A clock accumulates EM energy at the
center frequency it is generating. Spread Spectrum distributes this energy over a small frequency bandwidth therefore
spreading the same amount of energy over a spectrum. This technique is achieved by modulating the clock down from
its resting frequency by a certain percentage (which also determines the energy distribution bandwidth). In this product,
the modulation is 1.0% down from the resting frequency.
TEST MODE CONTROL TABLE
The FS0, 1 and 2 pin table on page 1 defines the function of these pins in setting the output clock frequencies. When the
SSO# pin is brought to a logic low state the function of this table is modified. The following table indicates the effect of
this signal when the SSON# pin is at low logic level
SSON
FS2
FS1
FS0
CPU
PCI
PCIF
48M
REF
0
90.0
30.0
60.0
48
14.318
0
1
94.5
31.5
63
48
14.318
0
1
0
66.6
33.3
66.6
48
14.318
0
1
TriState
0
1
0
100 SS
33.3 SS
66.6 SS
48
14.318
0
1
0
1
T2*
0
1
0
120
30
60
48
14.318
0
1
XIN/2
XIN/4
XIN/2
XIN
Note: (All frequencies are in Mhz, Xin defines the clock applied to the XIN pin for testing purposes, and SS = Spread
Spectrum.) T2 is a IMI device test mode and is not intended for customer use.
Amplitude
(dB
)
Frequency(MH
Modulated Center
Frequency
Without Spectrum
With Spectrum Spread
Spectrum Analysis
Rested Center
frequency
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