參數資料
型號: SDA5254
廠商: SIEMENS A G
元件分類: 圖文
英文描述: 8-BIT SINGLE CHIP MICROCONTROLLERS
中文描述: TELETEXT AND VPS/PDC DECODER, PDIP52
文件頁數: 43/143頁
文件大小: 1050K
代理商: SDA5254
SDA 525x
Semiconductor Group
43
1998-04-08
6.3.1.1
CPU-Hardware
Instruction Decoder
Each program instruction is decoded by the instruction decoder. This unit generates the
internal signals that control the functions of each unit within the CPU-section. These
signals control the sources and destination of data, as well as the function of the
Arithmetic/Logic Unit (ALU).
Program Control Section
The program control section controls the sequence in which the instructions stored in
program memory are executed. The conditional branch logic enables conditions internal
and external to the processor to cause a change in the sequence of program execution.
The 16-bit program counter holds the address of the instruction to be executed. It is
manipulated with the control transfer instructions listed in
Chapter “Instruction Set” on
page 116
.
Internal Data RAM
The internal data RAM provides a 256-byte scratch pad memory, which includes four
register banks and 128 direct addressable software flags. Each register bank contains
registers R0 – R7. The addressable flags are located in the 16-byte locations starting at
byte address 32 and ending with byte location 47 of the RAM-address space.
In addition to this standard internal data RAM the processor contains an extended
internal RAM. It can be considered as a part of an external data memory. It is referenced
by MOVX-instructions (MOVX A, @DPTR), the memory map is shown in
Figure
21
.
Arithmetic/Logic Unit (ALU)
The arithmetic section of the processor performs many data manipulation functions and
includes the Arithmetic/Logic Unit (ALU) and the A, B and PSW-registers. The ALU
accepts 8-bit data words from one or two sources and generates an 8-bit result under
the control of the instruction decoder. The ALU performs the arithmetic operations of
add, subtract, multiply, divide, increment, decrement, BCD-decimal-add-adjust and
compare, and the logic operations of and, or, exclusive-or, complement and rotate (right,
left, or nibble swap).
The A-register is the accumulator, the B-register is dedicated during multiply and divide
and serves as both a source and a destination. During all other operations the B-register
is simply another location of the special function register space and may be used for any
purpose.
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相關代理商/技術參數
參數描述
SDA5254-2 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5254M 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5254M-2 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5255 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics
SDA5255-2 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics