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參數(shù)資料
| 型號： | SDA5254-2 |
| 廠商： | SIEMENS A G |
| 元件分類： | 圖文 |
| 英文描述： | ICs for Consumer Electronics |
| 中文描述： | TELETEXT DECODER, PDIP52 |
| 文件頁數(shù)： | 20/143頁 |
| 文件大?。?/td> | 1050K |
| 代理商： | SDA5254-2 |
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SDA 525x
Semiconductor Group
20
1998-04-08
6.2
The display features of SDA525x are similar to the Siemens SDA5248 TTX controller.
The display generator reads character addresses and control characters from the
display memory, selects the pixel information from the character ROM and translates it
into RGB values corresponding to the World Standard Teletext Norm. The national
option character bits for 11 languages inclusive X/26 characters are also supported.
Display Generator
6.2.1
A page consists of 25 rows of 40 characters each. One character covers a matrix of
12 horizontal and 10 vertical pixels. The pixel frequency should be 12 MHz
corresponding to 1
μ
s for one character and 40
μ
s for one row. A total of 250 TV lines
are used for TTX display. The display can be shifted horizontally from 0
μ
s to 21.33
μ
s
with respect to HS and vertically from line 1 (314) to line 64 (377) with respect to VS. The
display position is determined by the registers DHD and DVD.
Note: To avoid interferences between the subharmonics of the 18 MHz controller clock
and the 12 MHz pixel clock, a pixel clock of about 11,5 MHz is recommended.
Display Format and Timing
6.2.2
A cursor is available which changes foreground to background colour for one character.
Cursor flash can be realized via software enabling/disabling the cursor. The cursor
position is defined by cursor position registers DCRP and DCCP.
Display Cursor
6.2.3
A character background flash (character is changed to background colour) is realized by
hardware. The flash frequency is 1 Hz with a duty cycle of 32:18.
Flash
6.2.4
The SDA 525x delivers the new full screen background colour feature. Special function
register SFR DTIM(7-5) includes three bits which define the default background colour
for the inner and outer screen area.
Full Screen Background Colour
6.2.5
The clear page logic generates a signal which is interpreted by the character generator
to identify non displayable rows. In row 25 specific information is stored by the
microcontroller indicating which of the rows 0 - 24 should be interpreted as erased during
character generation. At the beginning of each row the special control characters are
read from the display memory (see
Table 3
).
Clear Page Logic
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SDA 5251 | TVTEXT 8-Bit Microcontroller(ROM-Versions )(TV視頻的8位微控制器（含ROM 型 ）) |
| SDA 5252 | TVTEXT 8-Bit Microcontroller(ROM-Versions )(TV視頻的8位微控制器（含ROM 型 ）) |
| SDA 5254 | TVTEXT 8-Bit Microcontroller(ROM-Versions )(TV視頻的8位微控制器（含ROM 型 ）) |
| SDA5254M | ICs for Consumer Electronics |
| SDA525X | ICs for Consumer Electronics |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA5254M | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5254M-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5255 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5255-2 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
| SDA5255M | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:ICs for Consumer Electronics |
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