
PRIMUS
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Vertical and/or horizontal
windowing with four different
speed factors
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Still field
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Product Brief
PRIMUS
SDA 9402
P
owerful Scan
r
ate Converter
I
ncluding
Mu
lti
s
tandard Color
Decoder
D
ata Acquisition
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7 x CVBS inputs or 3 x CVBS
and 2 x Y and 2 x C inputs,
respectively
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3 CVBS outputs
(even with Y/C input)
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2 x RGB+FBL inputs or 2 x YUV
inputs respectively
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Two 9-Bit A/D converters for
sampling of Y/C or CVBS
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Four 8-Bit A/D converters for
sampling of RGB and FBL
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Digital Multistandard Color
Decoder for PAL/NTSC/ SECAM
with automatic standard detection
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Mixing or 1f
H
RGB signals
(’SCART’) with CVBS channel
Noise Reduction
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Motion-adaptive and temporal
noise reduction
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Flexible programming of
the temporal noise reduction
characteristics
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Automatic measurement of
the noise level
Embedded DRAM Core for Field
Memory, 4:2:2 Format
Flexible Clock and
Synchronization Concept
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Display Raster locked to
incoming signal or free-running
Scan Rate Conversion
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Simple 100/120 Hz
interlaced scan conversion
(e.g. AABB, AAAA)
Flexible Compression and
Expansion of the Input Signal
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Horizontal compression and
expansion for 4:3 and 16:9 tubes
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panorama effect with five zones
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support of split-screen applica-
tions (PiP/TXT processor
necessary)
High Performance Display
Processing
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Peaking, Chrominance Transient
Improvement (CTI)
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Flexible Output Sync Controller
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Three 9-Bit D/A converters
(two-fold oversampling)
Signal Manipulations
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Insertion of colored background
Pin compatible to other devices
of the scan rate converter
single-chip-family
Technical Data
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I
2
C-Bus control (400 kHz)
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P-MQFP-80 package
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3.3 V and 1.8 V (± 5%)
supply voltages
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0.18
μ
m eDRAM CMOS
technology
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4:2:2 processing
Potential Application
The SDA 9402 is a new component
of the Infineon MEGAVISION
IC
set for building low cost TV sets
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100/120 Hz interlaced TV sets