參數(shù)資料
型號(hào): SAB83C517A-5N18-T4
文件頁(yè)數(shù): 40/77頁(yè)
文件大?。?/td> 1358K
代理商: SAB83C517A-5N18-T4
SAB 80C517A/83C517A-5
Semiconductor Group
39
1994-05-01
Reload of Timer 2
A 16-bit reload can be performed with the 16-bit CRC register, which is a concatenation of the
8-bit registers CRCL and CRCH. There are two modes from which to select:
Mode 0:
Reload is caused by a timer overflow (auto-reload).
Mode 1:
Reload is caused in response to a negative transition at pin T2EX (P1.5),
which can also request an interrupt.
Timer/Counters 0 and 1
These timer/counters are fully compatible with timer/counter 0 or 1 of the SAB 8051 and can
operate in four modes:
Mode 0:
8-bit timer/counter with 32:1 prescaler
Mode 1:
16-bit timer/counter
Mode 2:
8-bit timer/counter with 8-bit auto reload
Mode 3:
Timer/counter 0 is configured as one 8-bit timer;
timer/counter 1 in this mode holds its count.
External inputs INT0 and INT1 can be programmed to function as a gate for timer/counters
0 and 1 to facilitate pulse width measurements.
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