參數(shù)資料
型號(hào): SAB83C517A-5N18-T4
文件頁(yè)數(shù): 14/77頁(yè)
文件大?。?/td> 1358K
代理商: SAB83C517A-5N18-T4
SAB 80C517A/83C517A-5
Semiconductor Group
13
1994-05-01
HWPD
60
36
I
Hardware Power Down
A low level on this pin for the duration of
one machine cycle while the oscillator is
running resets the SAB 80C517A. A low
level for a longer period will force the part to
Power Down Mode with the pins floating.
(see table 7)
P5.7 - P5.0 61 - 68
37 - 44
I/O
I
Port 5
is a bidirectional I/O port with internal pull-
up resistors. Port 5 pins that have 1 s
written to them are pulled high by the
internal pull-up resistors, and in that state
can be used as inputs. As inputs, port 5
pins being externally pulled low will source
current (
I
IL
, in the DC characteristics)
because of the internal pull-up resistors.
This port also serves the alternate function
"Concurrent Compare" and "Set/Reset
Compare". The secondary functions are
assigned to the port 5 pins as follows:
– CCM0 to CCM7 (P5.0 to P5.7):
concurrent compare or Set/Reset
OWE
69
45
I/O
Oscillator Watchdog Enable
A high level on this pin enables the
oscillator watchdog. When left
unconnected this pin is pulled high by a
weak internal pull-up resistor. When held at
low level the oscillator watchdog function is
off.
*
I = Input
O = Output
Pin Definitions and Functions
(cont’d)
Symbol
Pin Number
I/O
*)
Function
P-LCC-84
P-MQFP-100-2
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