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參數(shù)資料
| 型號(hào)： | S5T8808A01-R0B0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | PLL FREQUENCY SHNTHESIZER FOR PAGER |
| 中文描述： | 鎖相環(huán)頻率SHNTHESIZER的尋呼機(jī) |
| 文件頁數(shù)： | 11/12頁 |
| 文件大小： | 109K |
| 代理商： | S5T8808A01-R0B0 |
PLL FREQUENCY SHNTHESIZER FOR PAGER
S5T8808A
11
Figure 6. Phase Detector / Lock Detector Output Waveforms
NOTES:
1.
Phase detector always compares the Phase difference of N-counter with R-counter, and set to High or Low state as
much as the phase difference.
The LD output set to Low level same as Phase detector error width.
2.
Fr
Fn
PDP
LD
VDD1
GND
PDA
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| S5T8808X01-V0B0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PLL FREQUENCY SHNTHESIZER FOR PAGER |
| S5T8809 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER FOR PAGER |
| S5T8809X01-R0B0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:PLL FREQUENCY SYNTHESIZER FOR PAGER |
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