參數(shù)資料
型號(hào)： S1C60L09D
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, UUC70
封裝： DIE-70
文件頁(yè)數(shù)： 48/62頁(yè)
文件大?。?/td> 476K
代理商： S1C60L09D
CHAPTER 6: ELECTRICAL CHARACTERISTICS
46
EPSON
S1C60N09 TECHNICAL MANUAL
6.4 Analog Circuit Characteristics and Current Consumption
S1C60N09 (Crystal oscillation)
4.5 V LCD panel, 1/4, 1/3, 1/2 duty, 1/3 bias (VL2 is shorted to VSS inside the IC)
Normal mode
Item
LCD drive voltage
Current consumption
Unless otherwise specified:
VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C4=0.1F
Symbol
VL1
VL2
VL3
IOP
Unit
V
A
Max.
1/2VL2
×0.9
3/2VL2
×0.9
2.5
5.0
Typ.
VSS
1.0
2.5
Min.
1/2VL2
- 0.1
3/2VL2
- 0.1
Condition
Connect 1 M
load resistor between VDD and VL1
(without panel load)
Connect 1 M
load resistor between VDD and VL2
(without panel load)
Connect 1 M
load resistor between VDD and VL3
(without panel load)
During HALT
Without
During execution
panel load
Heavy load protection mode
Item
LCD drive voltage
Current consumption
Unless otherwise specified:
VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C4=0.1F
Symbol
VL1
VL2
VL3
IOP
Unit
V
A
Max.
1/2VL2
×0.85
3/2VL2
×0.85
5.5
10.0
Typ.
VSS
2.0
5.5
Min.
1/2VL2
- 0.1
3/2VL2
- 0.1
Condition
Connect 1 M
load resistor between VDD and VL1
(without panel load)
Connect 1 M
load resistor between VDD and VL2
(without panel load)
Connect 1 M
load resistor between VDD and VL3
(without panel load)
During HALT
Without
During execution
panel load
3 V LCD panel, 1/4, 1/3, 1/2 duty, 1/2 bias (VL3 is shorted to VSS inside the IC and VL1 is shorted
to VL2 outside the IC)
Normal mode
Item
LCD drive voltage
Current consumption
Unless otherwise specified:
VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C3=0.1F
Symbol
VL1
VL2
VL3
IOP
Unit
V
A
Max.
1/2VL3
×0.9
1/2VL3
×0.9
2.5
5.0
Typ.
VSS
1.0
2.5
Min.
1/2VL3
- 0.1
1/2VL3
- 0.1
Condition
Connect 1 M
load resistor between VDD and VL1
(without panel load)
Connect 1 M
load resistor between VDD and VL2
(without panel load)
Connect 1 M
load resistor between VDD and VL3
(without panel load)
During HALT
Without
During execution
panel load
Heavy load protection mode
Item
LCD drive voltage
Current consumption
Unless otherwise specified:
VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25
°C, CG=25pF, VS1/VL1–VL3 are internal voltage, C1–C3=0.1F
Symbol
VL1
VL2
VL3
IOP
Unit
V
A
Max.
1/2VL3
×0.85
1/2VL3
×0.85
5.5
10.0
Typ.
VSS
2.0
5.5
Min.
1/2VL3
- 0.1
1/2VL3
- 0.1
Condition
Connect 1 M
load resistor between VDD and VL1
(without panel load)
Connect 1 M
load resistor between VDD and VL2
(without panel load)
Connect 1 M
load resistor between VDD and VL3
(without panel load)
During HALT
Without
During execution
panel load
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