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參數(shù)資料
| 型號： | S1C60L09D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, UUC70 |
| 封裝： | DIE-70 |
| 文件頁數(shù)： | 38/62頁 |
| 文件大?。?/td> | 476K |
| 代理商： | S1C60L09D |
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CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Stopwatch Timer)
S1C60N09 TECHNICAL MANUAL
EPSON
37
Reading of interrupt factor flags are available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to "1", an
interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will not
be generated. Be very careful when interrupt factor flags are in the same address.
After an initial reset, these flags are set to "0".
SWRST: Stopwatch timer reset (07EHD1)
This bit resets the stopwatch timer.
When "1" is written: Stopwatch timer reset
When "0" is written: No operation
Reading: Always "0"
The stopwatch timer is reset when "1" is written to SWRST. When the stopwatch timer is reset while
running, operation restarts immediately. Also, while stopped, the reset data is maintained.
This bit is write-only, and is always "0" when read.
SWRUN: Stopwatch timer run/stop (07EHD2)
This bit controls run/stop of the stopwatch timer.
When "1" is written: Run
When "0" is written: Stop
Reading: Valid
The stopwatch timer runs when "1" is written to SWRUN, and stops when "0" is written.
When stopped, the timer data is maintained until the timer next Run or is reset. Also, when the timer
runs after being stopped, the data that was maintained can be used to resume the count.
If the timer data is read while running, a correct read may be impossible because of the carry from the
low-order bit (SWL) to the high-order bit (SWH). This occurs if reading has extended over the SWL and
SWH bits when the carry occurs. To prevent this, read after stopping, and then continue running. Also,
the stopped duration must be within 976 sec (256 Hz, 1/4 cycle).
At initial reset, this register is set to "0".
4.8.5 Programming notes
(1) Note that the frequencies and times differ from the description in this section when the oscillation
frequency is not 32.768 kHz.
(2) If the timer data is read while running, a correct read may be impossible because of the carry from the
low-order bit (SWL) to the high-order bit (SWH). This occurs if reading has extended over the SWL
and SWH bits when the carry occurs. To prevent this, read after stopping, and then continue running.
Also, the stopped duration must be within 976 sec (256 Hz, 1/4 cycle).
(3) Reading of interrupt factor flags are available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to "1", an
interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request will
not be generated. Be very careful when interrupt factor flags are in the same address.
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