參數(shù)資料
型號(hào): S-80847ANY
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PBCY3
封裝: PLASTIC, TO-92, 3 PIN
文件頁數(shù): 7/31頁
文件大?。?/td> 412K
代理商: S-80847ANY
SUPER-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR
S-808 Series
14
Seiko Instruments Inc.
n Operation
1.
Basic operation : CMOS active low output
(1) When power supply voltage VDD is greater than the release voltage +VDET, the Nch transistor is OFF and the Pch
transistor ON, causing VDD (high) to appear at the output. With the Nch transistor N1 of Figure 9 OFF, the comparator
input voltage is (RB+RC)/(RA+RB+RC)
×V
DD.
(2) When power supply voltage VDD goes below +VDET, the output maintains the power supply voltage level, as long as VDD
remains above the detection voltage -VDET. When VDD does fall below -VDET (A in Figure 10), the Nch transistor goes ON,
the Pch transistor goes OFF, and VSS appears at the output. With the Nch transistor N 1 of Figure 9 ON, the comparator
input voltage is RB/(RA+RB)
×V
DD.
(3) When VDD falls below the minimum operating voltage, the output becomes undefined. However, output will revert to VDD
if a pull-up has been employed.
(4) VSS will again be output when VDD rises above the minimum operating voltage. VSS will continue to be output even when
VDD surpasses -VDET, as long as it does not exceed the release voltage +VDET.
(5) When VDD rises above +VDET (B in Figure 10), the Nch transistor goes OFF, the Pch transistor goes ON, and VDD
appears at the output.
A
B
VD
VSS
Release voltage (+VDET)
Detection voltage (-VDET)
Min. operating voltage
OUT terminal output
Hysteresis
width (VHYS)
VD
VSS
(1)
(2)
(3)
(5)
(4)
+
VREF
RA
R
RC
N1
VS
VDD
Figure 9
*
OUT
*
Pch
Nch
Figure 10
* Parasitic diode
DISCONTINUED
PRODUCT
相關(guān)PDF資料
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