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參數(shù)資料
| 型號： | S-3531A |
| 廠商： | Seiko Instruments Inc. |
| 英文描述： | CMOS Real-Time Clock IC Supporting an IIC-Bus(支持IIC-BUS的CMOS實時時鐘芯片) |
| 中文描述： | CMOS實時時鐘IC支持一個IIC總線（支持IIC總線的實時時鐘芯片的CMOS） |
| 文件頁數(shù)： | 14/31頁 |
| 文件大?。?/td> | 185K |
| 代理商： | S-3531A |
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REAL-TIME CLOCK
S-3531A
Seiko Instruments Inc.
13
NO.
INT1AE
INT1ME
INT1FE
Description
0
0
0
0
Output disabled (No interrupt output)
1
*
0
1
Selected frequency steady interrupt output
2
*
1
0
Per-minute edge interrupt output
3
*
1
1
Per-minute steady interrupt output
4
1
0
0
Per-minute alarm interrupt output
5.Interrupt
There are different five output formats from the INT1 terminal, which are chosen by the INT1AE, INT1ME and INT1FE bits
of the status register .
(1) Alarm interrupt output
Alarm interrupt is enabled by setting hour and minute data to the INT1 register and turning the status register's INT1AE
to "1" and INT1ME and INT1FE to "0" . When set hour data is met, low is output from the INT1 terminal. Since the
output is held, rewrite INT1AE of the status register to "0" through serial communication to turn the output to high (OFF
state). When you perform DISABLE or ENABLE communication while the corresponding signal is being retained (for
one minute), "Low" signal is output from the INT1 terminal again.
(2) Selected frequency steady interrupt output
When you set frequency/duty data to the INT1 register and turn the status register's INT1ME to "0" and INT1FE to "1,"
clock set at the INT1 register is output from the INT1 terminal.
(3) Per-minute edge interrupt output
When a first minute carry is performed after the status register's INT1ME is set with "1" and INT1FE with "0" , low is
output from the INT1 terminal . Since the output is held, rewrite INT1AE, INT1ME and INT1FE of the status register to
"0" through serial communication to turn the output to high (OFF state). When you perform DISABLE or ENABLE
communication while the minute carry processing signal is being retained (for 10 msec), "Low" signal is output from the
INT1 terminal again.
(4) Per-minute steady interrupt output
When a first carry is performed after the status register's INT1ME and INT1FE are set with "1" , clock is output from the
INT1 terminal with a period of one minute (50% duty). When you perform DISABLE or ENABLE communication while
the INT1 terminal is at "L," "Low" signal is output from the INT1 terminal again.
Note 1 : If changing an output mode, give care to the state of the INT1 register and output.
Note 2 : If per-minute edge interrupt output or per-minute steady interrupt output is chosen, the INT1 register has no
meaning.
Note * : Don't care.
Table 4 Interrupt description
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