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參數(shù)資料
| 型號： | PIC24HJ32GP302T-I/MM |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 30/84頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSPIC MCU/DSP 32K 28-QFN |
| 標(biāo)準(zhǔn)包裝： | 1,600 |
| 系列： | PIC® 24H |
| 核心處理器： | PIC |
| 芯體尺寸： | 16-位 |
| 速度： | 40 MIP |
| 連通性： | I²C，PMP，SPI，UART/USART |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 21 |
| 程序存儲器容量： | 32KB（11K x 24） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 4K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 10x10b/12b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-VQFN 裸露焊盤 |
| 包裝： | 帶卷 (TR) |
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dsPIC33F/PIC24H PROGRAMMING SPECIFICATION
DS70152H-page 36
2010 Microchip Technology Inc.
REGISTER 5-1:
NVMCON: FLASH MEMORY CONTROL REGISTER
R/SO-0(1)
R/W-0(1)
U-0
WR
WREN
WRERR
—
bit 15
bit 8
U-0
R/W-0(1)
U-0
R/W-0(1)
—
ERASE
—
—NVMOP<3:0>(2)
bit 7
bit 0
Legend:
SO = Satiable only bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
WR: Write Control bit
1 = Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
cleared by hardware once operation is complete
0 = Program or erase operation is complete and inactive
bit 14
WREN: Write Enable bit
1 = Enable Flash program/erase operations
0 = Inhibit Flash program/erase operations
bit 13
WRERR: Write Sequence Error Flag bit
1 = An improper program or erase sequence attempt or termination has occurred (bit is set
automatically on any set attempt of the WR bit)
0 = The program or erase operation completed normally
bit 12-7
Unimplemented: Read as ‘0’
bit 6
ERASE: Erase/Program Enable bit
1 = Perform the erase operation specified by NVMOP<3:0> on the next WR command
0 = Perform the program operation specified by NVMOP<3:0> on the next WR command
bit 5-4
Unimplemented: Read as ‘0’
bit 3-0
NVMOP<3:0>: NVM Operation Select bits(2)
If ERASE = 1:
1111 = Memory Bulk Erase operation
1110 = Reserved
1101 = Erase General Segment
1100 = Erase Secure Segment
1011 = Reserved
0011 = No operation
0010 = Memory page erase operation
0001 = No operation
0000 = Erase a single Configuration register byte
If ERASE = 0:
1111 = No operation
1110 = Reserved
1101 = No operation
1100 = No operation
1011 = Reserved
0011 = Memory word program operation
0010 = No operation
0001 = Memory row program operation
0000 = Program a single Configuration register byte
Note 1: These bits can only be reset on a Power-on Reset (POR).
2: All other combinations of NVMOP<3:0> are unimplemented.
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