• 參數(shù)資料
    型號(hào)： PIC18LF45K22-E/PT
    廠商： Microchip Technology
    文件頁(yè)數(shù)： 50/71頁(yè)
    文件大?。?/td> 0K
    描述： MCU 32KB FLASH 1536B RAM 44TQFP
    標(biāo)準(zhǔn)包裝： 160
    系列： PIC® XLP™ 18F
    核心處理器： PIC
    芯體尺寸： 8-位
    速度： 48MHz
    連通性： I²C，SPI，UART/USART
    外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，HLVD，POR，PWM，WDT
    輸入/輸出數(shù)： 35
    程序存儲(chǔ)器容量： 32KB（16K x 16）
    程序存儲(chǔ)器類型： 閃存
    EEPROM 大?。?/td> 256 x 8
    RAM 容量： 1.5K x 8
    電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
    數(shù)據(jù)轉(zhuǎn)換器： A/D 30x10b
    振蕩器型： 內(nèi)部
    工作溫度： -40°C ~ 125°C
    封裝/外殼： 44-TQFP
    包裝： 管件
    PIC18(L)F2X/4XK22
    DS41412F-page 54
    2010-2012 Microchip Technology Inc.
    3.5
    Exiting Idle and Sleep Modes
    An exit from Sleep mode or any of the Idle modes is
    triggered by any one of the following:
    an interrupt
    a Reset
    a Watchdog Time-out
    This section discusses the triggers that cause exits
    from power-managed modes. The clocking subsystem
    actions are discussed in each of the power-managed
    3.5.1
    EXIT BY INTERRUPT
    Any of the available interrupt sources can cause the
    device to exit from an Idle mode or the Sleep mode to
    a Run mode. To enable this functionality, an interrupt
    source must be enabled by setting its enable bit in one
    of the INTCON or PIE registers. The exit sequence is
    initiated when the corresponding interrupt flag bit is set.
    The instruction immediately following the SLEEP
    instruction is executed on all exits by interrupt from Idle
    or Sleep modes. Code execution then branches to the
    interrupt vector if the GIE/GIEH bit of the INTCON
    register is set, otherwise code execution continues
    without branching (see Section 9.0 “Interrupts”).
    A fixed delay of interval TCSD following the wake event
    is required when leaving Sleep and Idle modes. This
    delay is required for the CPU to prepare for execution.
    Instruction execution resumes on the first clock cycle
    following this delay.
    3.5.2
    EXIT BY WDT TIME-OUT
    A WDT time-out will cause different actions depending
    on which power-managed mode the device is in when
    the time-out occurs.
    If the device is not executing code (all Idle modes and
    Sleep mode), the time-out will result in an exit from the
    power-managed
    mode
    (see
    is executing code (all Run modes), the time-out will
    result in a WDT Reset (see Section 24.3 “Watchdog
    The WDT timer and postscaler are cleared by any one
    of the following:
    executing a SLEEP instruction
    executing a CLRWDT instruction
    the loss of the currently selected clock source
    when the Fail-Safe Clock Monitor is enabled
    modifying the IRCF bits in the OSCCON register
    when the internal oscillator block is the device
    clock source
    3.5.3
    EXIT BY RESET
    Exiting Sleep and Idle modes by Reset causes code
    execution to restart at address 0. See Section 4.0
    “Reset” for more details.
    The exit delay time from Reset to the start of code
    execution depends on both the clock sources before
    and after the wake-up and the type of oscillator.
    3.5.4
    EXIT WITHOUT AN OSCILLATOR
    START-UP DELAY
    Certain exits from power-managed modes do not
    invoke the OST at all. There are two cases:
    PRI_IDLE mode, where the primary clock source
    is not stopped and
    the primary clock source is not any of the LP, XT,
    HS or HSPLL modes.
    In these instances, the primary clock source either
    does not require an oscillator start-up delay since it is
    already running (PRI_IDLE), or normally does not
    require an oscillator start-up delay (RC, EC, INTOSC,
    and INTOSCIO modes). However, a fixed delay of
    interval TCSD following the wake event is still required
    when leaving Sleep and Idle modes to allow the CPU
    to prepare for execution. Instruction execution resumes
    on the first clock cycle following this delay.
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    參數(shù)描述
    PIC18LF45K22-I/ML 功能描述:8位微控制器 -MCU 32KB Flash 1536B RAM 8B nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
    PIC18LF45K22-I/MV 功能描述:8位微控制器 -MCU 32KB 1536b RAM 8bit familynanoWatt XLP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
    PIC18LF45K22-I/P 功能描述:8位微控制器 -MCU 32KB 1536bytes RAM 8B nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
    PIC18LF45K22-I/PT 功能描述:8位微控制器 -MCU 32KB Flash 1536B RAM 8B nanoWatt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
    PIC18LF45K22-I/PT 制造商:Microchip Technology Inc 功能描述:IC 8BIT MCU PIC18LF 64MHZ TQFP-44 制造商:Microchip Technology Inc 功能描述:IC, 8BIT MCU, PIC18LF, 64MHZ, TQFP-44
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