參數(shù)資料
型號： PIC16CR77T-I/PT
廠商： Microchip Technology
文件頁數(shù)： 131/172頁
文件大?。?/td> 0K
描述： IC PIC MCU 8KX14 44TQFP
標準包裝： 1,200
系列： PIC® 16C
核心處理器： PIC
芯體尺寸： 8-位
速度： 20MHz
連通性： I²C，SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，WDT
輸入/輸出數(shù)： 33
程序存儲器容量： 14KB（8K x 14）
程序存儲器類型： ROM
RAM 容量： 368 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
包裝： 帶卷 (TR)
2007 Microchip Technology Inc.
DS21993C-page 59
PIC16CR7X
9.0
SYNCHRONOUS SERIAL PORT
(SSP) MODULE
9.1
SSP Module Overview
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The SSP module
can operate in one of two modes:
Serial Peripheral Interface (SPI)
Inter-Integrated Circuit (I2C)
An overview of I2C operations and additional informa-
tion on the SSP module can be found in the “PIC
Mid-Range
MCU
Family
Reference
Manual”
(DS33023).
Refer to Application Note AN578, “Use of the SSP
Module in the I 2C Multi-Master Environment”
(DS00578).
9.2
SPI Mode
This section contains register definitions and opera-
tional characteristics of the SPI module. Additional
information on the SPI module can be found in the
“PIC Mid-Range MCU Family Reference Manual”
(DS33023).
SPI mode allows 8 bits of data to be synchronously
transmitted
and
received
simultaneously.
To
accomplish communication, typically three pins are
used:
Serial Data Out (SDO) RC5/SDO
Serial Data In (SDI) RC4/SDI/SDA
Serial Clock (SCK) RC3/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
Slave Select (SS) RA5/SS/AN4
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and SSPSTAT<7:6>. These control bits allow the
following to be specified:
Master mode (SCK is the clock output)
Slave mode (SCK is the clock input)
Clock Polarity (Idle state of SCK)
Clock edge (output data on rising/falling edge of
SCK)
Clock Rate (Master mode only)
Slave Select mode (Slave mode only)
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