4 FN7331.9 January 17, 2014 Closed Loop AC Electrical Specifications V
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鍨嬭櫉锛� EL5102IW-T7A
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 8/13闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC VFA SLEW SGL 400MHZ SOT23-6
妯欐簴鍖呰锛� 250
鏀惧ぇ鍣ㄩ鍨嬶細 闆诲鍙嶉
闆昏矾鏁�(sh霉)锛� 1
杞�(zhu菐n)鎻涢€熺巼锛� 4000 V/µs
-3db甯跺锛� 400MHz
闆绘祦 - 杓稿叆鍋忓锛� 2µA
闆诲 - 杓稿叆鍋忕Щ锛� 1000µV
闆绘祦 - 闆绘簮锛� 5.2mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 150mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 3 V ~ 13.2 V锛�±1.5 V ~ 6.6 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� SOT-23-6
渚涙噳鍟嗚ō鍌欏皝瑁濓細 SOT-23-6
鍖呰锛� 甯跺嵎 (TR)
EL5202, EL5203
4
FN7331.9
January 17, 2014
Closed Loop AC Electrical Specifications VS+ = +5V, VS- = -5V, TA = +25掳C, VCE = 0V, AV = +1, RF = 0惟, RL = 150惟 to GND,
Unless Otherwise Specified. (Note 6)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
(Note 9)
TYP
MAX
(Note 9)
UNIT
BW
-3dB Bandwidth (VOUT = 400mVP-P)AV = 1, RF = 0惟
400
MHz
SR
Slew Rate
AV = +2, RL = 100惟, VOUT = -3V to +3V
1100
2200
5000
V/s
RL = 500惟, VOUT = -3V to +3V
4000
V/s
tR,tF
Rise Time, Fall Time
卤0.1V step
2.8
ns
OS
Overshoot
卤0.1V step
10
%
tS
0.1% Settling Time
VS = 卤5V, RL = 500惟, AV = 1, VOUT = 卤3V
20
ns
dG
Differential Gain (Note 7)
AV = 2, RF = 1k惟
0.01
%
dP
Differential Phase (Note 7)
AV = 2, RF = 1k惟
0.01
eN
Input Noise Voltage
f = 10kHz
12
nV/
鈭欻z
iN
Input Noise Current
f = 10kHz
11
pA/
鈭欻z
tDIS
Disable Time (Note 8)
50
ns
tEN
Enable Time (Note 8)
25
ns
NOTES:
6. All AC tests are performed on a 鈥渨armed up鈥� part, except slew rate, which is pulse tested.
7. Standard NTSC signal = 286mVP-P, f = 3.58MHz, as VIN is swept from 0.6V to 1.314V.RL is DC coupled.
8. Disable/Enable time is defined as the time from when the logic signal is applied to the CE pin to when the supply current has reached half its final
value.
9. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
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