參數(shù)資料
型號: PIC16C711-04/P
廠商: Microchip Technology
文件頁數(shù): 60/177頁
文件大?。?/td> 0K
描述: IC MCU OTP 1KX14 A/D 18DIP
產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 25
系列: PIC® 16C
核心處理器: PIC
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 1.75KB(1K x 14)
程序存儲器類型: OTP
RAM 容量: 68 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x8b
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 18-DIP(0.300",7.62mm)
包裝: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1059-ND - ADAPTER 18 ZIF BD W/18SO PLUGS
DVA16XP180-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
152
7593L–AVR–09/12
AT90USB64/128
In fast PWM mode, the counter is incremented until the counter value matches the TOP value.
The counter is then cleared at the following timer clock cycle. The timing diagram for the fast
PWM mode is shown in Figure 16-6. The TCNT2 value is in the timing diagram shown as a his-
togram for illustrating the single-slope operation. The diagram includes non-inverted and
inverted PWM outputs. The small horizontal line marks on the TCNT2 slopes represent compare
matches between OCR2x and TCNT2.
Figure 16-6. Fast PWM mode, timing diagram.
The Timer/Counter Overflow Flag (TOV2) is set each time the counter reaches TOP. If the inter-
rupt is enabled, the interrupt handler routine can be used for updating the compare value.
In fast PWM mode, the compare unit allows generation of PWM waveforms on the OC2x pin.
Setting the COM2x1:0 bits to two will produce a non-inverted PWM and an inverted PWM output
can be generated by setting the COM2x1:0 to three. TOP is defined as 0xFF when WGM2:0 = 3,
and OCR2A when WGM2:0 = 7 (See Table 16-2 on page 157). The actual OC2x value will only
be visible on the port pin if the data direction for the port pin is set as output. The PWM wave-
form is generated by setting (or clearing) the OC2x Register at the compare match between
OCR2x and TCNT2, and clearing (or setting) the OC2x Register at the timer clock cycle the
counter is cleared (changes from TOP to BOTTOM).
The PWM frequency for the output can be calculated by the following equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR2A Register represent special cases when generating a PWM
waveform output in the fast PWM mode. If the OCR2A is set equal to BOTTOM, the output will
be a narrow spike for each MAX+1 timer clock cycle. Setting the OCR2A equal to MAX will result
in a constantly high or low output (depending on the polarity of the output set by the COM2A1:0
bits.)
A frequency (with 50% duty cycle) waveform output in fast PWM mode can be achieved by set-
ting OC2x to toggle its logical level on each compare match (COM2x1:0 = 1). The waveform
TCNTn
OCRnx Update and
TOVn Interrupt Flag Set
1
Period
2
3
OCnx
(COMnx1:0 = 2)
(COMnx1:0 = 3)
OCRnx Interrupt Flag Set
4
5
6
7
fOCnxPWM
f
clk_I/O
N 256
------------------
=
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