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參數(shù)資料
| 型號： | NIS6111QPT1 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 參考電壓二極管 |
| 英文描述： | Better Efficiency Rectifier System |
| 中文描述： | 30 A, 24 V, SILICON, RECTIFIER DIODE |
| 封裝： | PLASTIC, CASE 488AC-01, LLP-32 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 65K |
| 代理商： | NIS6111QPT1 |
NIS6111
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS
(T
J
= 25
°
C, Reg In = 8.0 V, unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
SYNCHRONOUS RECTIFIER
ON STATE
Conduction Mode ON Resistance
(I = 55 Adc, V
GS
= 4.5 V)
(I = 20 Adc, V
GS
= 4.5 V)
R
ON
4.9
4.7
m
OFF STATE
Reverse Leakage Current (V
R
= 28 VDC)
I
DSS
1.5
A
Reverse Leakage Current (V
R
= 28 VDC, T
J
= 150
°
C)
I
DSS
10
A
SWITCHING (See Figures 2 and 4) (Note 2)
FET Turnon Time (Imax = 3.0 A, I rev = 1.0 A, Vrev = 5.0 V)
t
sat
45
ns
Reverse Recovery Time (Imax = 3.0 A, I rev = 1.0 A, Vrev = 5.0 V)
t
rev
35
ns
BODY DIODE
Forward OnVoltage (Notes 1 and 3)
I = 20 Adc, V
GS
= 0 V
I = 55 Adc, V
GS
= 0 V
V
SD
0.82
0.99
1.2
Vdc
Reverse Recovery Time (I
S
= 30 Adc, di/dt = 100 A/ s)
t
rr
t
a
t
b
36.5
17.7
18.8
ns
POWER SUPPLY (V
R
= 20 V, T
J
= 25 C)
Supply Voltage (Pin 2 to Pin 1), Internal Bias Voltage
V
CC
4.7
4.9
5.1
V
Cap Charge Time
(Zero Initial Charge, 5.0 V @ Reg In, to UVLO Threshold, C = 0.22 F)
T
J
= 20
°
C to 125
°
C
t
chg
t
chg
2.7
3.3
s
s
Headroom (for Vcap = 4.7 V)
Vhd
1.0
V
Minimum Duty Cycle for Operation (Freq = 100 kHz)
d
min
2.0
%
Charge Current
250
300
mA
Delay Time (T
amb
= 20
°
C)
T
d
51
ns
Reg In Voltage (Pin 5 to Pin 1)
Minimum Voltage Required for Operation (V
SD
+ V
hd
)
4.65
V
Minimum Voltage Required for Fall Gate Drive (V
CC
+ V
hd
)
5.9
CONTROL CIRCUIT
Bias Supply Current (f
sw
= 100 kHz)
I
BIAS
2.0
4.0
mA
Input Offset Voltage
I
OS
2.0
5.0
mV
Shutdown Voltage (UVLO)
V
SD
3.65
V
1. Pulse width
2. Pulse width 2.0 s, duty cycle
3. Switching characteristics are independent of operating junction temperature.
4. Based on 0.062
″
FR4 board, doublesided 1 oz copper.
300 s, duty cycle
2%.
5%.
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