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參數(shù)資料
型號: NC7WZ241L8X
廠商: Fairchild Semiconductor
文件頁數(shù): 4/9頁
文件大?。?/td> 0K
描述: IC BUFF TRI-ST DL UHS 8MICROPAK
產(chǎn)品變化通告: Die Material, Mold Compound Change 03/Oct/2008
標準包裝: 5,000
系列: 7WZ
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 2
每個元件的位元數(shù): 1
輸出電流高,低: 32mA,32mA
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-XFQFN
供應(yīng)商設(shè)備封裝: 8-MicroPak?
包裝: 帶卷 (TR)
www.fairchildsemi.com
4
NC7W
Z241
Noise Characteristics
Note 4: Parameter guaranteed by design.
AC Electrical Characteristics
Note 5: Parameter guaranteed by design. tOSLH = | tPLHmax tPLHmin |; tOSHL = | tPHLmax tPHLmin |.
Note 6: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICC static).
Symbol
Parameter
VCC
TA = +25°C
Units
Conditions
(V)
Typ
Max
VOLP (Note 4)
Quiet Output Maximum Dynamic VOL
5.0
1.0
V
CL = 50 pF
VOLV (Note 4)
Quiet Output Minimum Dynamic VOL
5.0
1.0
V
CL = 50 pF
VOHV (Note 4) Quiet Output Minimum Dynamic VOH
5.0
4.0
V
CL = 50 pF
VIHD (Note 4)
Minimum HIGH Level Dynamic Input Voltage
5.0
3.5
V
CL = 50 pF
VILD (Note 4)
Maximum LOW Level Dynamic Input Voltage
5.0
1.5
V
CL = 50 pF
Symbol
Parameter
VCC
TA = +25°CTA = 40°C to +85°C
Units
Conditions
Figure
(V)
Min
Typ
Max
Min
Max
Number
tPLH
Propagation Delay
1.8
± 0.15
2.0
12.0
2.0
13.0
ns
CL = 15 pF
Figures
1, 3
tPHL
An to Yn
2.5
± 0.2
1.0
7.5
1.0
8.0
RD
= 1 M
3.3
± 0.3
0.8
5.2
0.8
5.5
S1 = OPEN
5.0
± 0.5
0.5
4.5
0.5
4.8
tPLH
Propagation Delay
3.3
± 0.3
1.2
5.7
1.2
6.0
ns
CL = 50 pF
Figures
1, 3
tPHL
An to Yn
5.0
± 0.5
0.8
5.0
0.8
5.3
RD
= 500
S1 = OPEN
tOSLH
Output to Output Skew
3.3
± 0.3
1.0
ns
CL = 50 pF
Figures
1, 3
tOSHL
(Note 5)
5.0
± 0.5
0.8
RD
= 500
S1 = OPEN
tPZL
Output Enable Time
1.8
± 0.15
3.0
14.0
3.0
15.0
ns
CL = 50 pF
Figures
1, 3
tPZH
2.5
± 0.2
1.8
8.5
1.8
9.0
RD, RU
= 500
3.3
± 0.3
1.2
6.2
1.2
6.5
S1 = GND for tPZH
5.0
± 0.5
0.8
5.5
0.8
5.8
S1 = VI for tPZL
VI = 2 × VCC
tPLZ
Output Disable Time
1.8
± 0.15
2.5
12.0
2.5
13.0
ns
CL = 50 pF
Figures
1, 3
tPHZ
2.5
± 0.2
1.5
8.0
1.5
8.5
RD, RU
= 500
3.3
± 0.3
0.8
5.7
0.8
6.0
S1 = GND for tPHZ
5.0
± 0.5
0.3
4.7
0.3
5.0
S1 = VI for tPLZ
VI = 2 × VCC
CIN
Input Capacitance
0
2.5
pF
COUT
Output Capacitance
5.0
4
CPD
Power Dissipation
3.3
10
pF
OE
= GND
Figure 2
Capacitance (Note 6)
5.0
12
OE
= V
CC
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