參數(shù)資料
型號(hào)： NAND512R4A2CN6F
廠商： 意法半導(dǎo)體
英文描述： 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
中文描述： 512兆位，528 Byte/264字的頁(yè)面，1.8V/3V，NAND閃存芯片
文件頁(yè)數(shù)： 19/51頁(yè)
文件大小： 517K
代理商： NAND512R4A2CN6F
Device operations
NAND512-A2C
26/51
6.7
Read Status Register
The device contains a Status Register which provides information on the current or previous
Program or Erase operation. The various bits in the Status Register convey information and
errors on the operation.
The Status Register is read by issuing the Read Status Register command. The Status
Register information is present on the output data bus (I/O0-I/O7) on the falling edge of Chip
Enable or Read Enable, whichever occurs last. When several memories are connected in a
system, the use of Chip Enable and Read Enable signals allows the system to poll each
device separately, even when the Ready/Busy pins are common-wired. It is not necessary to
toggle the Chip Enable or Read Enable signals to update the contents of the Status
Register.
After the Read Status Register command has been issued, the device remains in Read
Status Register mode until another command is issued. Therefore if a Read Status Register
command is issued during a Random Read cycle a new read command must be issued to
continue with a Page Read.
The Status Register bits are summarized in Table 11: Status Register bits. Refer to Table 11
in conjunction with the following text descriptions.
6.7.1
Write Protection Bit (SR7)
The Write Protection bit can be used to identify if the device is protected or not. If the Write
Protection bit is set to ‘1’ the device is not protected and program or erase operations are
allowed. If the Write Protection bit is set to ‘0’ the device is protected and program or erase
operations are not allowed.
6.7.2
P/E/R Controller Bit (SR6)
The Program/Erase/Read Controller bit indicates whether the P/E/R Controller is active or
inactive. When the P/E/R Controller bit is set to ‘0’, the P/E/R Controller is active (device is
busy); when the bit is set to ‘1’, the P/E/R Controller is inactive (device is ready).
6.7.3
Error Bit (SR0)
The Error bit is used to identify if any errors have been detected by the P/E/R Controller. The
Error Bit is set to ’1’ when a program or erase operation has failed to write the correct data to
the memory. If the Error Bit is set to ‘0’ the operation has completed successfully.
6.7.4
SR5, SR4, SR3, SR2 and SR1 are reserved
相關(guān)PDF資料
PDF描述
NAND512R4A2CZA6E 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A2CZA6F 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A2C 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512W3A2CZA6E 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512W3A2C 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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NAND512R4A2CZA6 制造商:Micron Technology Inc 功能描述:512MB. 3V X8 NO OPTION TSOP48TSOP-1 48 12X20 AL 42 - Trays
NAND512R4A2DDI6 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
NAND512W3A0AN6 功能描述:閃存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
NAND512W3A0AN6E 功能描述:閃存 2.7-3.6V 512M(64Mx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問(wèn)時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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