參數(shù)資料
型號(hào)： NAND512R3A2CN6F
廠商： 意法半導(dǎo)體
英文描述： 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
中文描述： 512兆位，528 Byte/264字的頁面，1.8V/3V，NAND閃存芯片
文件頁數(shù)： 13/51頁
文件大?。?/td> 517K
代理商： NAND512R3A2CN6F
Device operations
NAND512-A2C
20/51
Figure 7.
Pointer operations for programming
6.2
Read Memory Array
Each operation to read the memory area starts with a pointer operation as shown in the
Section 6.1: Pointer operations. Once the area (main or spare) has been selected using the
Read A, Read B or Read C commands four bus cycles (for 512Mb and 1Gb devices) or
three bus cycles (for 128Mb and 256Mb devices) are required to input the address (refer to
Table 6 and Table 7) of the data to be read.
The device defaults to Read A mode after power-up or a Reset operation.
When reading the spare area addresses:
●
A0 to A3 (x8 devices)
●
A0 to A2 (x16 devices)
are used to set the start address of the spare area while addresses:
●
A4 to A7 (x8 devices)
●
A3 to A7 (x16 devices)
are ignored.
Once the Read A or Read C commands have been issued they do not need to be reissued
for subsequent read operations as the pointer remains in the respective area. However, the
Read B command is effective for only one operation, once an operation has been executed
in Area B the pointer returns automatically to Area A and so another Read B command is
required to start another read operation in Area B.
Once a read command is issued two types of operations are available: Random Read and
Page Read.
6.2.1
Random Read
Each time the command is issued the first read is Random Read.
ai07591
I/O
Address
Inputs
Data Input
10h
80h
Areas A, B, C can be programmed depending on how much data is input. Subsequent 00h commands can be omitted.
AREA A
00h
Address
Inputs
Data Input
10h
80h
00h
I/O
Address
Inputs
Data Input
10h
80h
Areas B, C can be programmed depending on how much data is input. The 01h command must be re-issued before each program.
AREA B
01h
Address
Inputs
Data Input
10h
80h
01h
I/O
Address
Inputs
Data Input
10h
80h
Only Areas C can be programmed. Subsequent 50h commands can be omitted.
AREA C
50h
Address
Inputs
Data Input
10h
80h
50h
相關(guān)PDF資料
PDF描述
NAND512R3A2C 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A2CN6F 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A2CZA6E 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A2CZA6F 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
NAND512R4A2C 512 Mbit, 528 Byte/264 Word Page, 1.8V/3V, NAND Flash Memories
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
NAND512R3A2CZA6E 功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
NAND512R3A2CZA6F 制造商:Micron Technology Inc 功能描述:SLC NAND Flash Parallel 1.8V 512Mbit 64M x 8bit 15us 63-Pin VFBGA T/R
NAND512R3A2DDI6 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
NAND512R3A2DZA6E 功能描述:IC FLASH 512MBIT 63VFBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:8-MFP 包裝:帶卷 (TR)
NAND512R3A2SE06 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
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