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參數(shù)資料
| 型號(hào)： | MT90221 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device |
| 中文描述： | 四IMA的/單向物理層設(shè)備 |
| 文件頁(yè)數(shù)： | 15/114頁(yè) |
| 文件大小： | 304K |
| 代理商： | MT90221 |
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MT90221
7
Notes:
1.
2.
Static memory stores the received cells. RAM is used for reordering the cells
These signals are used to transfer data between the MT90221 and the local processor
81, 88, 90,
97, 120,
122, 129,
131
NC
No Connect.
Can be left unconnected.
System Signals
74
Clk
I
System Clock (25 MHz nominal)
. In the MT90221, this clock is used for all
internal operations of the device.
76
Test1
I
Test1.
This signal should be pulled up for normal operation.
54
Reset
I
System Reset.
This is an active low input signal. It causes the device to enter the
initial state. The Clk signal must be active to reset the internal registers.
72
TCK
I
JTAG Test Clock.
It should be pulled down if not used
71
TMS
I
JTAG Test Mode Select
. TMS is sampled on the rising edge of TCK. TMS has an
internal pull- up resistor.
70
TDI
I
JTAG Test Data Input
.
68
TDO
O
JTAG Test Data Output
.
Note:
TDO is tristated by TMS pin.
69
TRST
I
TAG Test Reset
(active low). Should be asserted LOW on power-up and during
reset. Must be HIGH for JTAG boundary-scan operation.
Note:
This pin has an
internal
pull-down
.
77
Test2
I
Test2
. It should be pulled down for normal operation.
153
Test3
I
Test3
. It should be pulled down for normal operation.
152
Test4
I
Test4
. It should be pulled up for normal operation.
NOT 5V TOLERANT
Pinout Summary
Type
Input
Output
I/O
N.C.
Power
Ground
TX UTOPIA
16
1
RX UTOPIA
7
10
Microprocessor Interface
14
1
8
External Memory Interface
22
8
TX PCM Interface
4
8
RX PCM Interface
12
PLL Interface
4
2
Miscellaneous
10
1
No Connect
24
Power
25
Ground
31
Total
208
63
41
24
24
25
31
Pin Description (continued)
Pin #
Name
I/O
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90221AL | Quad IMA/UNI PHY Device |
| MT9041B | T1/E1 System Synchronizer |
| MT9041BP | T1/E1 System Synchronizer |
| MT9041 | Multiple Output Trunk PLL |
| MT9041AP | IC REG LDO 150MA 5.0V 0.5% 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
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