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參數(shù)資料
| 型號： | MT90220 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | IC, MICREL LDO 5A ADJ VLT REG TO-2 |
| 中文描述： | 八路IMA的/單向物理層設(shè)備 |
| 文件頁數(shù)： | 85/116頁 |
| 文件大小： | 306K |
| 代理商： | MT90220 |
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MT90220
77
Address (Hex):
Direct access
register operation
Reset Value (Hex):
208 - 20F
1 register per link. The RxClk and TxClk signals must be active for correct
00
Bit #
Type
Description
7:5
4
R
Unused. Should read 0’s.
This bit is set when the RX UTOPIA FIFO associated with a Link in UNI mode overflows.
This bit is cleared by writing 0.
This bit is set when the UTOPIA Input counter for all cells (or all Stuff cells event)
associated with a link used in UNI mode overflows. This bit is cleared by writing 0.
This bit is set when the UTOPIA Input counter for Idle Cells associated with a link used in
UNI mode overflows. This bit is cleared by writing 0.
This bit is set when the UTOPIA Input counter for Unassigned Cells associated with a link
used in UNI mode overflows. This bit is cleared by writing 0.
This bit is set when the UTOPIA Input counter for HEC Errored Cells associated with a
link used in UNI mode overflows. This bit is cleared by writing 0.
R/W
3
R/W
2
R/W
1
R/W
0
R/W
Table 102 - IRQ UTOPIA UNI Overflow Status Registers
Address (Hex):
Direct access
register operation
Reset Value (Hex):
22A - 231
1 register per link. The RxClk and TxClk signals must be active for correct
00
Bit #
Type
Description
7
R/W
This bit is set when the TX PCM Link counter for all cells associated with a link used in
overflows.
This bit is set when the TX PCM Link counter for Idle or Filler Cells associated with a link
overflows.
This bit is set when the TX PCM Link counter for TX Stuff Cells associated with a link
overflows.
This bit is set when the TX PCM Link counter for TX ICP Cells associated with a link
overflows.
This bit is set when the RX PCM Link counter for all cells (or all Stuff cells event)
associated with a link overflows.
This bit is set when the RX PCM Link counter for Idle or Filler Cells associated with a link
overflows.
This bit is set when the RX PCM Link counter for HEC Errored Cells associated with a link
overflows.
This bit is set when the RX PCM Link counter for bad ICP Cells associated with a link
overflows.
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
R/W
Table 103 - IRQ Link UNI Overflow Status Registers
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90220AL | Octal IMA/UNI PHY Device |
| MT90221 | Quad IMA/UNI PHY Device |
| MT90221AL | Quad IMA/UNI PHY Device |
| MT9041B | T1/E1 System Synchronizer |
| MT9041BP | T1/E1 System Synchronizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90220AL | 制造商:Zarlink Semiconductor Inc 功能描述:I.C. |
| MT90220ALX01 | 制造商:Mitel Networks Corporation 功能描述: |
| MT90221 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
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