參數(shù)資料
型號: MT58V1MV18DT-10
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: SRAM
英文描述: 1M X 18 CACHE SRAM, 5 ns, PQFP100
封裝: PLASTIC, TQFP-100
文件頁數(shù): 31/34頁
文件大?。?/td> 521K
代理商: MT58V1MV18DT-10
18Mb: 1 MEG x 18, 512K x 32/36
PIPELINED, DCD SYNCBURST SRAM
18Mb: 1 Meg x 18, 512K x 32/36, Pipelined, DCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L1MY18D_16_D.fm – Rev. D, Pub 2/03
6
2003 Micron Technology, Inc.
NF/DQPa
NF/DQPb
NF/DQPc
NF/DQPd
NF
I/O
No Function/Parity Data I/Os: On the x32 version, these pins are No Function (NF). On the x18
version, byte “a” parity is DQPa; byte “b” parity is DQPb. On the x36 version, byte “a” parity
is DQPa; byte “b” parity is DQPb; byte “c” parity is DQPc; byte “d” parity is DQPd.
VDD
Supply
Power Supply: See DC Electrical Characteristics and Operating Conditions for range.
VDDQ
Supply
Isolated Output Buffer Supply: See DC Electrical Characteristics and Operating Conditions for
range.
VSS
Supply
Ground: GND.
DNU
Do Not Use: These pins are internally connected to the die. They may be left floating or
connected to ground to improve package heat dissipation.
NC
No Connect: These pins are not internally connected to the die. They may be left floating,
driven by signals, or connected to ground to improve package heat dissipation.
NF
No Function: These pins are internally connected to the die and have the capacitance of an
input pin. They may be left floating, driven by signals, or connected to ground to improve
package heat dissipation.
Table 1:
TQFP Pin Descriptions (continued)
SYMBOL
TYPE
DESCRIPTION
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