參數(shù)資料
型號(hào)： MT58L512Y36FT-8.5
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： SRAM
英文描述： 512K X 36 CACHE SRAM, 8.5 ns, PQFP100
封裝： PLASTIC, TQFP-100
文件頁(yè)數(shù)： 18/34頁(yè)
文件大小： 537K
代理商： MT58L512Y36FT-8.5
18Mb: 1 MEG x 18, 512K x 32/36
FLOW-THROUGH SYNCBURST SRAM
18Mb: 1 Meg x 18, 512K x 32/36, Flow-Through SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L1MY18F_16_D.fm – Rev. D, Pub. 2/03
25
2003 Micron Technology, Inc.
one difference between the two instructions. Unlike
the SAMPLE/PRELOAD instruction, EXTEST places
the SRAM outputs in a High-Z state.
IDCODE
The IDCODE instruction causes a vendor-specific,
32-bit code to be loaded into the instruction register. It
also places the instruction register between the TDI
and TDO balls and allows the IDCODE to be shifted
out of the device when the TAP controller enters the
Shift-DR state. The IDCODE instruction is loaded into
the instruction register upon power-up or whenever
the TAP controller is given a test logic reset state.
SAMPLE Z
The SAMPLE Z instruction causes the boundary
scan register to be connected between the TDI and
TDO balls when the TAP controller is in a Shift-DR
state. It also places all SRAM outputs into a High-Z
state.
SAMPLE/PRELOAD
SAMPLE/PRELOAD is a 1149.1 mandatory instruc-
tion. The PRELOAD portion of this instruction is not
implemented, so the device TAP controller is not fully
1149.1-compliant.
When the SAMPLE/PRELOAD instruction is loaded
into the instruction register and the TAP controller is in
the Capture-DR state, a snapshot of data on the inputs
and bidirectional balls is captured in the boundary
scan register.
The user must be aware that the TAP controller
clock can only operate at a frequency up to 10 MHz,
while the SRAM clock operates more than an order of
magnitude faster. Because there is a large difference in
the clock frequencies, it is possible that during the
Capture-DR state, an input or output will undergo a
transition. The TAP may then try to capture a signal
while in transition (metastable state). This will not
harm the device, but there is no guarantee as to the
value that will be captured. Repeatable results may not
be possible.
To guarantee that the boundary scan register will
capture the correct value of a signal, the SRAM signal
must be stabilized long enough to meet the TAP con-
troller’s capture setup plus hold time (tCS plus tCH).
The SRAM clock input might not be captured correctly
if there is no way in a design to stop (or slow) the clock
during a SAMPLE/PRELOAD instruction. If this is an
issue, it is still possible to capture all other signals and
simply ignore the value of the CLK captured in the
boundary scan register.
Once the data is captured, it is possible to shift out
the data by putting the TAP into the Shift-DR state.
This places the boundary scan register between the
TDI and TDO balls.
Note that since the PRELOAD part of the command
is not implemented, putting the TAP to the Update-DR
state while performing a SAMPLE/PRELOAD instruc-
tion will have the same effect as the Pause-DR com-
mand.
BYPASS
When the BYPASS instruction is loaded in the
instruction register and the TAP is placed in a Shift-DR
state, the bypass register is placed between the TDI
and TDO balls. The advantage of the BYPASS instruc-
tion is that it shortens the boundary scan path when
multiple devices are connected together on a board.
Reserved
These instructions are not implemented but are
reserved for future use. Do not use these instructions.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT58L512Y36PF-10 制造商:Rochester Electronics LLC 功能描述:- Bulk
MT58L512Y36PF-6 制造商:Rochester Electronics LLC 功能描述:- Bulk
MT58L512Y36PT10 制造商:MT 功能描述:New
MT58L512Y36PT-5 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述:
MT58L512Y36PT-6 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述:
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