參數(shù)資料
型號(hào): MT47H128M8HQ-3AT
元件分類: DRAM
英文描述: 128M X 8 DDR DRAM, 0.4 ns, PBGA60
封裝: 8 X 11.50 MM, ROHS COMPLIANT, FBGA-60
文件頁數(shù): 76/129頁
文件大?。?/td> 9252K
代理商: MT47H128M8HQ-3AT
AC Overshoot/Undershoot Specification
Some revisions will support the 0.9V maximum average amplitude instead of the 0.5V
maximum average amplitude shown in Table 25 and Table 26.
Table 25: Address and Control Balls
Applies to address balls, bank address balls, CS#, RAS#, CAS#, WE#, CKE, and ODT
Parameter
Specification
-187E
-25/-25E
-3/-3E
-37E
-5E
Maximum peak amplitude allowed for overshoot area
0.50V
Maximum peak amplitude allowed for undershoot area
0.50V
Maximum overshoot area above VDD (see Figure 21)
0.5 Vns
0.66 Vns
0.80 Vns
1.00 Vns
1.33 Vns
Maximum undershoot area below VSS (see Figure 22)
0.5 Vns
0.66 Vns
0.80 Vns
1.00 Vns
1.33 Vns
Table 26: Clock, Data, Strobe, and Mask Balls
Applies to DQ, DQS, DQS#, RDQS, RDQS#, UDQS, UDQS#, LDQS, LDQS#, DM, UDM, and LDM
Parameter
Specification
-187E
-25/-25E
-3/-3E
-37E
-5E
Maximum peak amplitude allowed for overshoot area
0.50V
Maximum peak amplitude allowed for undershoot area
0.50V
Maximum overshoot area above VDDQ (see Figure 21)
0.19 Vns
0.23 Vns
0.28 Vns
0.38 Vns
Maximum undershoot area below VSSQ (see Figure 22)
0.19 Vns
0.23 Vns
0.28 Vns
0.38 Vns
Figure 21: Overshoot
Maximum amplitude
Overshoot area
VDD/VDDQ
VSS/VSSQ
V
olts
(V)
Time (ns)
Figure 22: Undershoot
VSS/VSSQ
Maximum amplitude
Undershoot area
Time (ns)
V
olts
(V)
1Gb: x4, x8, x16 1.55V DDR2 SDRAM
AC Overshoot/Undershoot Specification
PDF: 09005aef82b91d01
1GbDDR2_1_55V.PDF Rev. A 5/09 EN
50
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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