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參數(shù)資料
| 型號： | MT47H128M8HQ-3AT |
| 元件分類： | DRAM |
| 英文描述： | 128M X 8 DDR DRAM, 0.4 ns, PBGA60 |
| 封裝： | 8 X 11.50 MM, ROHS COMPLIANT, FBGA-60 |
| 文件頁數(shù)： | 69/129頁 |
| 文件大?。?/td> | 9252K |
| 代理商： | MT47H128M8HQ-3AT |
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Table 19: Output Characteristics
Parameter
Min
Nom
Max
Units
Notes
Output impedance
Ω
Pull-up and pull-down mismatch
0
–
4
Ω
Output slew
rate
VDDmin = 1.7V
1.5
–
7
V/ns
VDDmin = 1.5V
0.8
–
7
V/ns
Notes: 1. Absolute specifications: 0°C
≤ TC ≤ +85°C; VDDQ = +1.8V ±0.1V, VDD = +1.8V ±0.1V.
2. Impedance measurement conditions for output source DC current: VDDQ = 1.7V;
VOUT = 1,420mV; (VOUT - VDDQ)/IOH must be less than 23.4Ω for values of VOUT between
VDDQ and VDDQ - 280mV. The impedance measurement condition for output sink DC cur-
rent: VDDQ = 1.7V; VOUT = 280mV; VOUT/IOL must be less than 23.4Ω for values of VOUT
between 0V and 280mV.
3. Mismatch is an absolute value between pull-up and pull-down; both are measured at
the same temperature and voltage.
4. Output slew rate for falling and rising edges is measured between VTT - 250mV and
VTT + 250mV for single-ended signals. For differential signals (DQS, DQS#), output slew
rate is measured between DQS - DQS# = –500mV and DQS# - DQS = +500mV. Output
slew rate is guaranteed by design but is not necessarily tested on each device.
5. The absolute value of the slew rate as measured from VIL(DC)max to VIH(DC)min is equal to
or greater than the slew rate as measured from VIL(AC)max to VIH(AC)min. This is guaran-
teed by design and characterization.
6. IT and AT devices require an additional 0.4 V/ns in the MAX limit when TC is between –
40°C and 0°C.
7. The output impedance drive curves MIN limit requires a 10% reduction when VDD is be-
tween 1.7V and 1.5V.
Figure 15: Output Slew Rate Load
Output
(VOUT)
Reference
point
25Ω
VTT = VDDQ/2
1Gb: x4, x8, x16 1.55V DDR2 SDRAM
Output Electrical Characteristics and Operating Conditions
PDF: 09005aef82b91d01
1GbDDR2_1_55V.PDF Rev. A 5/09 EN
44
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT47H128M8HQ-3EAT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
| MT47H128M8HQ-3EIT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
| MT47H128M8HQ-3EL | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
| MT47H128M8HQ-3IT | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:DDR2 SDRAM |
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