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256Mb: x4, x8, x16
DDR SDRAM
09005aef8076894f
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256MBDDRx4x8x16_2.fm - Rev. K 9/04 EN
73
2003 Micron Technology, Inc. All rights reserved.
Figure 45: Initialize and Load Mode Registers
NOTE:
1. VTT is not applied directly to the device; however, tVTD should be greater than or equal to zero to avoid device latch-up. VDDQ, VTT, and VREF
must be equal to or less than VDD + 0.3V. Alternatively, VTT may be 1.35V maximum during power-up, even if VDD/VDDQ are 0V, provided a
minimum of 42
of series resistance is used between the VTT supply and the input pin. Once initialized, VREF must always be powered within
the specified range.
2. Reset the DLL with A8 = H while programming the operating parameters.
3. tMRD is required before any command can be applied, and 200 cycles of CK are required before a READ command can be issued.
4. The two AUTO REFRESH commands at Td0 and Te0 may be applied following the LOAD MODE REGISTER (LMR) command at
Ta0.
5. Although not required by the Micron device, JEDEC specifies issuing another LMR command (A8 = L) prior to activating any
bank. If another LMR command is issued, the same operating parameters must be used as previously issued.
6. PRE = PRECHARGE command; LMR = LOAD MODE REGISTER command; AR = AUTO REFRESH command; ACT = ACTIVE com-
mand; RA = Row Address; and BA = Bank Address.
tVTD1
CKE
LVCMOS
LOW LEVEL
DQ
BA0, BA1
200 cycles of CK3
Load Extended
Mode Register
Load Mode
Register2
tMRD
tRP
tRFC
tRFC5
tIS
Power-up: VDD and CK stable
T = 200s
High-Z
tIH
DM
DQS
High-Z
A0-A9,
A11, A12
RA
A10
RA
ALL BANKS
CK
CK#
tCH
tCL
tCK
VTT1
VREF
VDD
VDDQ
COMMAND6
LMR
NOP
PRE
LMR
AR
ACT5
tIS tIH
BA0 = H,
BA1 = L
tIS
tIH
tIS
tIH
BA0 = L,
BA1 = L
tIS
tIH
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CODE
tIS
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CODE
PRE
ALL BANKS
tIS
tIH
T0
T1
Ta0
Tb0
Tc0
Td0
Te0
Tf0
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DON’T CARE
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-5B
-6/6T
-75E/75Z
-75
SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX UNITS
tCH
0.45 0.55 0.45 0.55 0.45 0.55 0.45 0.55
tCK
tCL
0.45 0.55 0.45 0.55 0.45 0.55 0.45 0.55
tCK
tCK (3)
5
7.5
NANANANANA
Na
ns
tCK (2.5)
6
13
6
13
7.5
13
7.5
13
ns
tCK (2)
7.5
13
7.5
13
7.5
13
10
13
ns
tIH
F
0.6
.75
.90
0.90
ns
tIS
F
0.6
.75
.90
0.90
ns
tIH
S
0.6
0.8
1
ns
tIS
S
0.6
0.8
1
ns
tMRD
10151515
ns
tRFC
70727575
ns
tRP
15
18
15
20
ns
tVTD
0000
ns
-5B
-6/6T
-75E/75Z
-75
SYMBOL MIN MAX MIN MAX MIN MAX MIN MAX UNITS