參數(shù)資料
型號： MT46V128M4P-75L:C
元件分類： DRAM
英文描述： 128M X 4 DDR DRAM, 0.75 ns, PDSO66
封裝： 0.400 INCH, LEAD FREE, PLASTIC, TSOP-66
文件頁數(shù)： 59/94頁
文件大?。?/td> 4179K
09005aef80a1d9e7
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512MBDDRx4x8x16_2.fm - Rev. J 1/06 EN
62
2000–2005 Micron Technology, Inc. All rights reserved.
512Mb: x4, x8, x16 DDR SDRAM
Electrical Specifications
Table 24:
IDD Specifications and Conditions (x16; -6/-6T/-75E/-75Z/-75)
0°C
≤ T
A ≤ +70°C; VDDQ = +2.5V ±0.2V, VDD = +2.5V ±0.2V
Parameter/Condition
Symbol
Max
Units
Notes
-6/6T
-75E
-75Z/-75
Operating Current: One bank; Active precharge;
tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM, and DQS inputs
changing once per clock cycle; Address and control inputs
changing once every two clock cycles
IDD0
130
115
mA
Operating Current: One bank; Active-read precharge;
Burst = 4; tRC = tRC (MIN); tCK = tCK (MIN); IOUT = 0mA;
Address and control inputs changing once per clock cycle
IDD1
160
145
mA
Precharge Power-down Standby Current: All banks
idle; Power-down mode; tCK = tCK (MIN); CKE = (LOW)
IDD2P
5
mA
Idle Standby Current: CS# = HIGH; All banks are idle;
tCK = tCK (MIN); CKE = HIGH; Address and other control
inputs changing once per clock
cycle; VIN = VREF for DQ, DQS,
and DM
IDD2F
45
40
mA
Active Power-down Standby Current: One bank active;
Power-down mode; tCK = tCK (MIN); CKE = LOW
IDD3P
35
30
mA
Active Standby Current: CS# = HIGH; CKE = HIGH;
One bank active
; tRC = tRAS (MAX); tCK = tCK (MIN); DQ, DM
and DQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
IDD3N
50
45
mA
Operating Current: Burst = 2; Reads; Continuous burst;
One bank active; Address and control inputs changing once
per clock cycle; tCK = tCK (MIN);
IOUT = 0mA
IDD4R
165
145
mA
Operating Current: Burst = 2; Writes; Continuous burst;
One bank active; Address and control inputs changing once
per clock cycle; tCK = tCK (MIN); DQ, DM, and DQS inputs
changing twice per clock cycle
IDD4W
195
160
135
mA
Auto Refresh Burst Current:
tREFC = tRFC (MIN)
IDD5
290
280
mA
tREFC= 7.8s
IDD5A
10
mA
Self Refresh Current: CKE
≤ 0.2V
Standard
IDD6
55
5
mA
Low Power (L)
IDD6A
33
3
mA
Operating Current: Four bank interleaving READs
(Burst = 4) with auto precharge, tRC = minimum tRC allowed;
tCK = tCK (MIN); Address and control inputs change only
during active READ or WRITE commands
IDD7
405
400
350
mA
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT46V128M4T67A3WC1 制造商:Micron Technology Inc 功能描述:128MX4 DDR SDRAM DIE-COM COMMERCIAL 2.5V - Trays
MT46V128M4TG-5B/D 制造商:Samsung Semiconductor 功能描述:
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