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| 型號： | MT46H128M32L4MA-54:A |
| 元件分類： | DRAM |
| 英文描述： | 128M X 32 DDR DRAM, 5 ns, PBGA168 |
| 封裝： | 12 X 12 MM, GREEN, PLASTIC, WFBGA-168 |
| 文件頁數(shù)： | 56/106頁 |
| 文件大?。?/td> | 3431K |
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Table 19: Truth Table – Current State Bank n – Command to Bank m
Notes 1–6 apply to all parameters in this table
Current State
CS#
RAS#
CAS#
WE# Command/Action
Notes
Any
H
X
DESELECT (NOP/continue previous operation)
L
H
NO OPERATION (NOP/continue previous operation)
Idle
X
Any command supported to bank m
Row activating,
active, or pre-
charging
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start READ burst)
L
H
L
WRITE (select column and start WRITE burst)
L
H
L
PRECHARGE
Read (auto pre-
charge disabled)
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start new READ burst)
L
H
L
WRITE (select column and start WRITE burst)
L
H
L
PRECHARGE
Write (auto pre-
charge disabled)
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start READ burst)
L
H
L
WRITE (select column and start new WRITE burst)
L
H
L
PRECHARGE
Read (with auto
precharge)
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start new READ burst)
L
H
L
WRITE (select column and start WRITE burst)
L
H
L
PRECHARGE
Write (with auto
precharge)
L
H
ACTIVE (select and activate row)
L
H
L
H
READ (select column and start READ burst)
L
H
L
WRITE (select column and start new WRITE burst)
L
H
L
PRECHARGE
Notes: 1. This table applies when CKEn - 1 was HIGH, CKEn is HIGH and after tXSR has been met (if
the previous state was self refresh), after tXP has been met (if the previous state was power-
down) or after a full initialization (if the previous state was deep power-down).
2. This table describes alternate bank operation, except where noted (for example, the cur-
rent state is for bank n and the commands shown are those supported for issue to bank
m, assuming that bank m is in such a state that the given command is supported). Excep-
tions are covered in the notes below.
3. Current state definitions:
Idle: The bank has been precharged, and tRP has been met.
Row active: A row in the bank has been activated, and tRCD has been met. No data bursts/
accesses and no register accesses are in progress.
Read: A READ burst has been initiated and has not yet terminated or been terminated.
Write: A WRITE burst has been initiated and has not yet terminated or been terminated.
3a. Both the read with auto precharge enabled state or the write with auto precharge
enabled state can be broken into two parts: the access period and the precharge period.
For read with auto precharge, the precharge period is defined as if the same burst was
2Gb: x16, x32 Mobile LPDDR SDRAM
Truth Tables
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
53
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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相關(guān)代理商/技術(shù)參數(shù) |
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| MT46H16M16 | 制造商:MICRON 制造商全稱:Micron Technology 功能描述:Mobile Double Data Rate (DDR) SDRAM |
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