參數(shù)資料
型號: MR80C52TXXX-30SBD
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44
文件頁數(shù): 121/141頁
文件大小: 7628K
代理商: MR80C52TXXX-30SBD
50
2486AA–AVR–02/2013
ATmega8(L)
Bit 0 – IVCE: Interrupt Vector Change Enable
The IVCE bit must be written to logic one to enable change of the IVSEL bit. IVCE is cleared by
hardware four cycles after it is written or when IVSEL is written. Setting the IVCE bit will disable
interrupts, as explained in the IVSEL description above. See Code Example below.
Assembly Code Example
Move_interrupts:
; Enable change of Interrupt Vectors
ldi
r16, (1<<IVCE)
out
GICR, r16
; Move interrupts to boot Flash section
ldi
r16, (1<<IVSEL)
out
GICR, r16
ret
C Code Example
void
Move_interrupts(void)
{
/* Enable change of Interrupt Vectors */
GICR = (1<<IVCE);
/* Move interrupts to boot Flash section */
GICR = (1<<IVSEL);
}
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